From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38947) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJg4y-00022k-53 for qemu-devel@nongnu.org; Mon, 27 Jul 2015 06:56:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZJg4v-0005ea-F6 for qemu-devel@nongnu.org; Mon, 27 Jul 2015 06:56:20 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:42628) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJg4v-0005d7-7t for qemu-devel@nongnu.org; Mon, 27 Jul 2015 06:56:17 -0400 From: Aurelien Jarno Date: Mon, 27 Jul 2015 12:56:06 +0200 Message-Id: <1437994568-7825-11-git-send-email-aurelien@aurel32.net> In-Reply-To: <1437994568-7825-1-git-send-email-aurelien@aurel32.net> References: <1437994568-7825-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PATCH v2 for-2.5 10/12] tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Aurelien Jarno , Richard Henderson They behave the same as ext32s_i64 and ext32u_i64 from the constant folding and zero propagation point of view, except that they can't be replaced by a mov, so we don't compute the affected value. Cc: Richard Henderson Signed-off-by: Aurelien Jarno --- tcg/optimize.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/tcg/optimize.c b/tcg/optimize.c index 8bfe7ff..8f33755 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -343,9 +343,11 @@ static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) CASE_OP_32_64(ext16u): return (uint16_t)x; + case INDEX_op_ext_i32_i64: case INDEX_op_ext32s_i64: return (int32_t)x; + case INDEX_op_extu_i32_i64: case INDEX_op_ext32u_i64: return (uint32_t)x; @@ -830,6 +832,15 @@ void tcg_optimize(TCGContext *s) mask = temps[args[1]].mask & mask; break; + case INDEX_op_ext_i32_i64: + if ((temps[args[1]].mask & 0x80000000) != 0) { + break; + } + case INDEX_op_extu_i32_i64: + /* We do not compute affected as it is a size changing op. */ + mask = (uint32_t)temps[args[1]].mask; + break; + CASE_OP_32_64(andc): /* Known-zeros does not imply known-ones. Therefore unless args[2] is constant, we can't infer anything from it. */ @@ -1008,6 +1019,8 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(ext16u): case INDEX_op_ext32s_i64: case INDEX_op_ext32u_i64: + case INDEX_op_ext_i32_i64: + case INDEX_op_extu_i32_i64: if (temp_is_const(args[1])) { tmp = do_constant_folding(opc, temps[args[1]].val, 0); tcg_opt_gen_movi(s, op, args, args[0], tmp); -- 2.1.4