From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35063) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJipU-0004oI-TQ for qemu-devel@nongnu.org; Mon, 27 Jul 2015 09:52:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZJipT-00067A-Ue for qemu-devel@nongnu.org; Mon, 27 Jul 2015 09:52:32 -0400 Received: from mx1.redhat.com ([209.132.183.28]:39156) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJipT-000676-Pg for qemu-devel@nongnu.org; Mon, 27 Jul 2015 09:52:31 -0400 From: Stefan Hajnoczi Date: Mon, 27 Jul 2015 14:52:00 +0100 Message-Id: <1438005121-31153-16-git-send-email-stefanha@redhat.com> In-Reply-To: <1438005121-31153-1-git-send-email-stefanha@redhat.com> References: <1438005121-31153-1-git-send-email-stefanha@redhat.com> Subject: [Qemu-devel] [PULL for-2.4 15/16] dp8393x: Flush packets when link comes up List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Fam Zheng , Stefan Hajnoczi From: Fam Zheng .can_receive callback changes semantics that once return 0, backend will try sending again until explicitly flushed, change the device to meet that. dp8393x_can_receive checks SONIC_CR_RXEN bit in SONIC_CR register and SONIC_ISR_RBE bit in SONIC_ISR register, try flushing the queue when either bit is being updated. Signed-off-by: Fam Zheng Reviewed-by: Stefan Hajnoczi Reviewed-by: Jason Wang Message-id: 1436955553-22791-12-git-send-email-famz@redhat.com Signed-off-by: Stefan Hajnoczi --- hw/net/dp8393x.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index cd889bc..451ff72 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -327,9 +327,14 @@ static void dp8393x_do_stop_timer(dp8393xState *s) dp8393x_update_wt_regs(s); } +static int dp8393x_can_receive(NetClientState *nc); + static void dp8393x_do_receiver_enable(dp8393xState *s) { s->regs[SONIC_CR] &= ~SONIC_CR_RXDIS; + if (dp8393x_can_receive(s->nic->ncs)) { + qemu_flush_queued_packets(qemu_get_queue(s->nic)); + } } static void dp8393x_do_receiver_disable(dp8393xState *s) @@ -569,6 +574,9 @@ static void dp8393x_write(void *opaque, hwaddr addr, uint64_t data, dp8393x_do_read_rra(s); } dp8393x_update_irq(s); + if (dp8393x_can_receive(s->nic->ncs)) { + qemu_flush_queued_packets(qemu_get_queue(s->nic)); + } break; /* Ignore least significant bit */ case SONIC_RSA: -- 2.4.3