From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60668) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJzss-0000dU-Jt for qemu-devel@nongnu.org; Tue, 28 Jul 2015 04:05:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZJzsk-0008MN-NQ for qemu-devel@nongnu.org; Tue, 28 Jul 2015 04:05:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59745) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJzsk-0008Lw-Id for qemu-devel@nongnu.org; Tue, 28 Jul 2015 04:05:02 -0400 From: Paolo Bonzini Date: Tue, 28 Jul 2015 10:04:54 +0200 Message-Id: <1438070695-24889-4-git-send-email-pbonzini@redhat.com> In-Reply-To: <1438070695-24889-1-git-send-email-pbonzini@redhat.com> References: <1438070695-24889-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 3/4] megasas: Add write function to handle write access to PCI BAR 3 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Salva=20Peir=C3=B3?= From: Salva Peir=C3=B3 This patch fixes a QEMU SEGFAULT when a write operation is performed on the memory region of the PCI BAR 3 (base address space). When a writeb(0xe0000000) is performed the .write function is invoked to handle the write access, however, since the .write is not initialised, the call to 0, causes QEMU to SEGFAULT. Signed-off-by: Salva Peir=C3=B3 Acked-by: Hannes Reinecke Message-Id: <1437987112-24744-1-git-send-email-speirofr@gmail.com> Signed-off-by: Paolo Bonzini --- hw/scsi/megasas.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index 51ba9e0..a04369c 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -2202,8 +2202,15 @@ static uint64_t megasas_queue_read(void *opaque, h= waddr addr, return 0; } =20 +static void megasas_queue_write(void *opaque, hwaddr addr, + uint64_t val, unsigned size) +{ + return; +} + static const MemoryRegionOps megasas_queue_ops =3D { .read =3D megasas_queue_read, + .write =3D megasas_queue_write, .endianness =3D DEVICE_LITTLE_ENDIAN, .impl =3D { .min_access_size =3D 8, --=20 2.4.3