From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48448) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZKm7K-0005jA-6O for qemu-devel@nongnu.org; Thu, 30 Jul 2015 07:35:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZKm7H-0002JJ-0n for qemu-devel@nongnu.org; Thu, 30 Jul 2015 07:35:18 -0400 Received: from e39.co.us.ibm.com ([32.97.110.160]:48898) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZKm7G-0002Iz-NA for qemu-devel@nongnu.org; Thu, 30 Jul 2015 07:35:14 -0400 Received: from /spool/local by e39.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 30 Jul 2015 05:35:14 -0600 From: Michael Roth Date: Thu, 30 Jul 2015 06:32:40 -0500 Message-Id: <1438255988-10418-26-git-send-email-mdroth@linux.vnet.ibm.com> In-Reply-To: <1438255988-10418-1-git-send-email-mdroth@linux.vnet.ibm.com> References: <1438255988-10418-1-git-send-email-mdroth@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH 25/53] i8254: fix out-of-bounds memory access in pit_ioport_read() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Petr Matousek , qemu-stable@nongnu.org From: Petr Matousek Due converting PIO to the new memory read/write api we no longer provide separate I/O region lenghts for read and write operations. As a result, reading from PIT Mode/Command register will end with accessing pit->channels with invalid index. Fix this by ignoring read from the Mode/Command register. This is CVE-2015-3214. Reported-by: Matt Tait Fixes: 0505bcdec8228d8de39ab1a02644e71999e7c052 Cc: qemu-stable@nongnu.org Signed-off-by: Petr Matousek Signed-off-by: Paolo Bonzini (cherry picked from commit d4862a87e31a51de9eb260f25c9e99a75efe3235) Signed-off-by: Michael Roth --- hw/timer/i8254.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c index 3450c98..9b65a33 100644 --- a/hw/timer/i8254.c +++ b/hw/timer/i8254.c @@ -196,6 +196,12 @@ static uint64_t pit_ioport_read(void *opaque, hwaddr addr, PITChannelState *s; addr &= 3; + + if (addr == 3) { + /* Mode/Command register is write only, read is ignored */ + return 0; + } + s = &pit->channels[addr]; if (s->status_latched) { s->status_latched = 0; -- 1.9.1