[Qemu-devel] [PULL 0/2] target-mips queue for 2.4

[Qemu-devel] [PULL 0/2] target-mips queue for 2.4

[Leon Alrae]

Hi,

This pull request contains two relatively important mips fixes for 2.4.

Thanks,
Leon

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>

The following changes since commit e95edefbd0559e1d0aa09549641b5d9af1f96fac:

  Merge remote-tracking branch 'remotes/sstabellini/tags/xen-migration-2.4-tag' into staging (2015-08-03 17:33:35 +0100)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20150804

for you to fetch changes up to b7f26e523914b982a1c1bfa8295f77ff9787c33c:

  target-mips: Copy restrictions from ext/ins to dext/dins (2015-08-04 11:53:15 +0100)

----------------------------------------------------------------
MIPS patches 2015-08-04

Changes:
* fix semihosting for microMIPS R6
* fix an abort when booting mips64 kernel with --enable-tcg-debug

----------------------------------------------------------------
Leon Alrae (1):
      target-mips: fix semihosting for microMIPS R6

Richard Henderson (1):
      target-mips: Copy restrictions from ext/ins to dext/dins

 target-mips/translate.c | 55 ++++++++++++++++++++++++++++---------------------
 1 file changed, 32 insertions(+), 23 deletions(-)

[Qemu-devel] [PULL 1/2] target-mips: fix semihosting for microMIPS R6

[Leon Alrae]

In semihosting mode the SDBBP 1 instructions should trigger UHI syscall,
but in QEMU this does not happen for recently added microMIPS R6.
Consequently bare metal microMIPS R6 programs supporting UHI will not run.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-mips/translate.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index d1de35a..e299643 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -13278,10 +13278,14 @@ static void gen_pool16c_r6_insn(DisasContext *ctx)
             break;
         case R6_SDBBP16:
             /* SDBBP16 */
-            if (ctx->hflags & MIPS_HFLAG_SBRI) {
-                generate_exception(ctx, EXCP_RI);
+            if (is_uhi(extract32(ctx->opcode, 6, 4))) {
+                gen_helper_do_semihosting(cpu_env);
             } else {
-                generate_exception(ctx, EXCP_DBp);
+                if (ctx->hflags & MIPS_HFLAG_SBRI) {
+                    generate_exception(ctx, EXCP_RI);
+                } else {
+                    generate_exception(ctx, EXCP_DBp);
+                }
             }
             break;
         }
-- 
2.1.0

[Qemu-devel] [PULL 2/2] target-mips: Copy restrictions from ext/ins to dext/dins

[Leon Alrae]

From: Richard Henderson <rth@twiddle.net>

The checks in dins is required to avoid triggering an assertion
in tcg_gen_deposit_tl.  The check in dext is just for completeness.
Fold the other D cases in via fallthru.

In this case the errant dins appears to be data, not code, as
translation failed to stop after a break insn.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 target-mips/translate.c | 45 +++++++++++++++++++++++++--------------------
 1 file changed, 25 insertions(+), 20 deletions(-)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index e299643..22ef84d 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -4750,48 +4750,53 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc, int rt,
     gen_load_gpr(t1, rs);
     switch (opc) {
     case OPC_EXT:
-        if (lsb + msb > 31)
+        if (lsb + msb > 31) {
             goto fail;
+        }
         tcg_gen_shri_tl(t0, t1, lsb);
         if (msb != 31) {
-            tcg_gen_andi_tl(t0, t0, (1 << (msb + 1)) - 1);
+            tcg_gen_andi_tl(t0, t0, (1U << (msb + 1)) - 1);
         } else {
             tcg_gen_ext32s_tl(t0, t0);
         }
         break;
 #if defined(TARGET_MIPS64)
-    case OPC_DEXTM:
-        tcg_gen_shri_tl(t0, t1, lsb);
-        if (msb != 31) {
-            tcg_gen_andi_tl(t0, t0, (1ULL << (msb + 1 + 32)) - 1);
-        }
-        break;
     case OPC_DEXTU:
-        tcg_gen_shri_tl(t0, t1, lsb + 32);
-        tcg_gen_andi_tl(t0, t0, (1ULL << (msb + 1)) - 1);
-        break;
+        lsb += 32;
+        goto do_dext;
+    case OPC_DEXTM:
+        msb += 32;
+        goto do_dext;
     case OPC_DEXT:
+    do_dext:
+        if (lsb + msb > 63) {
+            goto fail;
+        }
         tcg_gen_shri_tl(t0, t1, lsb);
-        tcg_gen_andi_tl(t0, t0, (1ULL << (msb + 1)) - 1);
+        if (msb != 63) {
+            tcg_gen_andi_tl(t0, t0, (1ULL << (msb + 1)) - 1);
+        }
         break;
 #endif
     case OPC_INS:
-        if (lsb > msb)
+        if (lsb > msb) {
             goto fail;
+        }
         gen_load_gpr(t0, rt);
         tcg_gen_deposit_tl(t0, t0, t1, lsb, msb - lsb + 1);
         tcg_gen_ext32s_tl(t0, t0);
         break;
 #if defined(TARGET_MIPS64)
-    case OPC_DINSM:
-        gen_load_gpr(t0, rt);
-        tcg_gen_deposit_tl(t0, t0, t1, lsb, msb + 32 - lsb + 1);
-        break;
     case OPC_DINSU:
-        gen_load_gpr(t0, rt);
-        tcg_gen_deposit_tl(t0, t0, t1, lsb + 32, msb - lsb + 1);
-        break;
+        lsb += 32;
+        /* FALLTHRU */
+    case OPC_DINSM:
+        msb += 32;
+        /* FALLTHRU */
     case OPC_DINS:
+        if (lsb > msb) {
+            goto fail;
+        }
         gen_load_gpr(t0, rt);
         tcg_gen_deposit_tl(t0, t0, t1, lsb, msb - lsb + 1);
         break;
-- 
2.1.0

Re: [Qemu-devel] [PULL 0/2] target-mips queue for 2.4

[Peter Maydell]

On 4 August 2015 at 12:46, Leon Alrae <leon.alrae@imgtec.com> wrote:
> Hi,
>
> This pull request contains two relatively important mips fixes for 2.4.
>
> Thanks,
> Leon
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
>
> The following changes since commit e95edefbd0559e1d0aa09549641b5d9af1f96fac:
>
>   Merge remote-tracking branch 'remotes/sstabellini/tags/xen-migration-2.4-tag' into staging (2015-08-03 17:33:35 +0100)
>
> are available in the git repository at:
>
>   git://github.com/lalrae/qemu.git tags/mips-20150804
>
> for you to fetch changes up to b7f26e523914b982a1c1bfa8295f77ff9787c33c:
>
>   target-mips: Copy restrictions from ext/ins to dext/dins (2015-08-04 11:53:15 +0100)
>
> ----------------------------------------------------------------
> MIPS patches 2015-08-04
>
> Changes:
> * fix semihosting for microMIPS R6
> * fix an abort when booting mips64 kernel with --enable-tcg-debug

Applied, thanks.

-- PMM