[Qemu-devel] [PATCH for-2.5 00/30] 680x0 instructions emulation

[Laurent Vivier <laurent@vivier.eu>]

Current QEMU m68k emulation only supports ColdFire processors.

This series adds compatibility with 680x0 processors.

Only non-privileged instruction are implemented.
680x0 FPU instructions are not implemented.

Once this series included in the QEMU mainline I will send a new series
with FPU instructions. With it, we can start a debian etch-m68k
container (init and all the bazaar).

Laurent Vivier (30):
  m68k: define m680x0 CPUs and features
  m68k: manage scaled index
  m68k: introduce read_imXX() functions
  m68k: set disassembler mode to 680x0 or coldfire
  m68k: define operand sizes
  m68k: REG() macro cleanup
  m68k: allow to update flags with operation on words and bytes
  m68k: update CPU flags management
  m68k: add X flag helpers
  m68k: tst bugfix
  m68k: improve clr/moveq
  m68k: Manage divw overflow
  m68k: set Z and N on divu/muls overflow as a real 68040
  m68k: allow adda/suba to add/sub word
  m68k: add more modes to movem
  m68k: Add all access modes and data sizes to some 680x0 instructions
  m68k: ori/andi/subi/addi/eori/cmpi can modify SR/CCR
  m68k: addq/subq can work with all the data sizes.
  m68k: add cmpm
  m68k: add exg
  m68k: add bkpt
  m68k: add cas instruction
  m68k: add linkl
  m68k: add DBcc and Scc (memory operand)
  m68k: add abcd, sbcd, nbcd instructions
  m68k: add mull/divl
  m68k: add addx/subx/negx
  m68k: shift/rotate bytes and words
  m68k: add rol/rox/ror/roxr
  m68k: add bitfield instructions

 cpu-exec.c              |    6 -
 disas.c                 |    4 +
 target-m68k/cpu.c       |   56 +-
 target-m68k/cpu.h       |   33 +-
 target-m68k/helper.c    |  817 +++++++++++++----
 target-m68k/helper.h    |   56 +-
 target-m68k/op_helper.c |  179 +++-
 target-m68k/qregs.def   |    1 +
 target-m68k/translate.c | 2259 ++++++++++++++++++++++++++++++++++++++---------
 9 files changed, 2781 insertions(+), 630 deletions(-)

-- 
2.4.3