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From: Christopher Covington <cov@codeaurora.org>
To: qemu-devel@nongnu.org
Cc: Christopher Covington <cov@codeaurora.org>
Subject: [Qemu-devel] [RFC 2/2] qemu-log: Add in_icount option
Date: Tue, 11 Aug 2015 11:08:32 -0400	[thread overview]
Message-ID: <1439305712-3957-3-git-send-email-cov@codeaurora.org> (raw)
In-Reply-To: <1439305712-3957-1-git-send-email-cov@codeaurora.org>

This allows one to see the size of blocks that get translated (in
target instructions) without the verbosity that in_asm would bring.
This is a step towards generating Basic Block Vectors (BBVs)* which
are histograms of blocks within a given interval. BBVs are useful in
determining whether one interval is similar to another. Note that this
does not yet provide useful information for circular chains of blocks
nor partially executed blocks. When such cases are handled reliably,
this output can also be used to double-check future facilities such as
exposing the instruction count to guest/target software through
interfaces such as an emulated Performance Monitors Unit.

* "Basic Block" used loosely; single-entry not guaranteed.

Signed-off-by: Christopher Covington <cov@codeaurora.org>
---
 include/qemu/log.h         | 1 +
 qemu-log.c                 | 2 ++
 target-arm/translate-a64.c | 4 ++++
 3 files changed, 7 insertions(+)

diff --git a/include/qemu/log.h b/include/qemu/log.h
index 0b0eef5..6c000ae 100644
--- a/include/qemu/log.h
+++ b/include/qemu/log.h
@@ -41,6 +41,7 @@ static inline bool qemu_log_enabled(void)
 #define LOG_UNIMP          (1 << 10)
 #define LOG_GUEST_ERROR    (1 << 11)
 #define CPU_LOG_MMU        (1 << 12)
+#define CPU_LOG_TB_IN_ICOUNT (1 << 13)
 
 /* Returns true if a bit is set in the current loglevel mask
  */
diff --git a/qemu-log.c b/qemu-log.c
index b3ebd3c..4a6cbc2 100644
--- a/qemu-log.c
+++ b/qemu-log.c
@@ -154,6 +154,8 @@ const QEMULogItem qemu_log_items[] = {
       "show generated host assembly code for each compiled TB" },
     { CPU_LOG_TB_IN_ASM, "in_asm",
       "show target assembly code for each compiled TB" },
+    { CPU_LOG_TB_IN_ICOUNT, "in_icount",
+      "show target instruction count for each compiled TB" },
     { CPU_LOG_TB_OP, "op",
       "show micro ops for each compiled TB" },
     { CPU_LOG_TB_OP_OPT, "op_opt",
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 0b0f4ae..4877c30 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -11132,6 +11132,10 @@ done_generating:
     gen_tb_end(tb, num_insns);
 
 #ifdef DEBUG_DISAS
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ICOUNT) &&
+        qemu_log_in_addr_range(pc_start)) {
+        qemu_log("0x" TARGET_FMT_lx " [size=%d]\n", pc_start, num_insns);
+    }
     if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) &&
         qemu_log_in_addr_range(pc_start)) {
         qemu_log("----------------\n");
-- 
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

      parent reply	other threads:[~2015-08-11 15:08 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-11 15:08 [Qemu-devel] RFC: Instruction Counting Debug Facilities Christopher Covington
2015-08-11 15:08 ` [Qemu-devel] [RFC 1/2] icount: Print instruction count on exit Christopher Covington
2015-08-11 15:08 ` Christopher Covington [this message]

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