qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 10/27] i.MX:Fix Coding style for UART emulator.
Date: Thu, 13 Aug 2015 11:44:30 +0100	[thread overview]
Message-ID: <1439462687-26903-11-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1439462687-26903-1-git-send-email-peter.maydell@linaro.org>

From: Jean-Christophe Dubois <jcd@tribudubois.net>

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 23ab872b7cd30b1399384fb26a2ebb75e9761d7b.1437080501.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/char/imx_serial.c | 34 +++++++++++++++++-----------------
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c
index f0ed255..f9da59f 100644
--- a/hw/char/imx_serial.c
+++ b/hw/char/imx_serial.c
@@ -26,7 +26,7 @@
 //#define DEBUG_SERIAL 1
 #ifdef DEBUG_SERIAL
 #define DPRINTF(fmt, args...) \
-do { printf("imx_serial: " fmt , ##args); } while (0)
+do { printf("%s: " fmt , TYPE_IMX_SERIAL, ##args); } while (0)
 #else
 #define DPRINTF(fmt, args...) do {} while (0)
 #endif
@@ -38,13 +38,13 @@ do { printf("imx_serial: " fmt , ##args); } while (0)
 //#define DEBUG_IMPLEMENTATION 1
 #ifdef DEBUG_IMPLEMENTATION
 #  define IPRINTF(fmt, args...) \
-    do  { fprintf(stderr, "imx_serial: " fmt, ##args); } while (0)
+    do  { fprintf(stderr, "%s: " fmt, TYPE_IMX_SERIAL, ##args); } while (0)
 #else
 #  define IPRINTF(fmt, args...) do {} while (0)
 #endif
 
 static const VMStateDescription vmstate_imx_serial = {
-    .name = "imx-serial",
+    .name = TYPE_IMX_SERIAL,
     .version_id = 1,
     .minimum_version_id = 1,
     .fields = (VMStateField[]) {
@@ -164,13 +164,13 @@ static uint64_t imx_serial_read(void *opaque, hwaddr offset,
         return 0x0; /* TODO */
 
     default:
-        IPRINTF("imx_serial_read: bad offset: 0x%x\n", (int)offset);
+        IPRINTF("%s: bad offset: 0x%x\n", __func__, (int)offset);
         return 0;
     }
 }
 
 static void imx_serial_write(void *opaque, hwaddr offset,
-                      uint64_t value, unsigned size)
+                             uint64_t value, unsigned size)
 {
     IMXSerialState *s = (IMXSerialState *)opaque;
     unsigned char ch;
@@ -220,25 +220,25 @@ static void imx_serial_write(void *opaque, hwaddr offset,
 
     case 0x25: /* USR1 */
         value &= USR1_AWAKE | USR1_AIRINT | USR1_DTRD | USR1_AGTIM |
-            USR1_FRAMERR | USR1_ESCF | USR1_RTSD | USR1_PARTYER;
+                 USR1_FRAMERR | USR1_ESCF | USR1_RTSD | USR1_PARTYER;
         s->usr1 &= ~value;
         break;
 
     case 0x26: /* USR2 */
-       /*
-        * Writing 1 to some bits clears them; all other
-        * values are ignored
-        */
+        /*
+         * Writing 1 to some bits clears them; all other
+         * values are ignored
+         */
         value &= USR2_ADET | USR2_DTRF | USR2_IDLE | USR2_ACST |
-            USR2_RIDELT | USR2_IRINT | USR2_WAKE |
-            USR2_DCDDELT | USR2_RTSF | USR2_BRCD | USR2_ORE;
+                 USR2_RIDELT | USR2_IRINT | USR2_WAKE |
+                 USR2_DCDDELT | USR2_RTSF | USR2_BRCD | USR2_ORE;
         s->usr2 &= ~value;
         break;
 
-        /*
-         * Linux expects to see what it writes to these registers
-         * We don't currently alter the baud rate
-         */
+    /*
+     * Linux expects to see what it writes to these registers
+     * We don't currently alter the baud rate
+     */
     case 0x29: /* UBIR */
         s->ubrc = value & 0xffff;
         break;
@@ -266,7 +266,7 @@ static void imx_serial_write(void *opaque, hwaddr offset,
         break;
 
     default:
-        IPRINTF("imx_serial_write: Bad offset 0x%x\n", (int)offset);
+        IPRINTF("%s: Bad offset 0x%x\n", __func__, (int)offset);
     }
 }
 
-- 
1.9.1

  parent reply	other threads:[~2015-08-13 10:45 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-13 10:44 [Qemu-devel] [PULL 00/27] target-arm queue Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 01/27] target-arm: Add CNTVOFF_EL2 Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 02/27] target-arm: Add CNTHCTL_EL2 Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 03/27] target-arm: Rename and move gt_cnt_reset Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 04/27] target-arm: Pass timeridx as argument to various timer functions Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 05/27] target-arm: Add the Hypervisor timer Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 06/27] hw/arm/virt: Replace magic IRQ constants with macros Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 07/27] hw/arm/virt: Connect the Hypervisor timer Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 08/27] i.MX: Split UART emulator in a header file and a source file Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 09/27] i.MX: Move serial initialization to init/realize of DeviceClass Peter Maydell
2015-08-13 10:44 ` Peter Maydell [this message]
2015-08-13 10:44 ` [Qemu-devel] [PULL 11/27] i.MX: Split AVIC emulator in a header file and a source file Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 12/27] i.MX: Fix Coding style for AVIC emulator Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 13/27] i.MX: Split CCM emulator in a header file and a source file Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 14/27] i.MX: Fix Coding style for CCM emulator Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 15/27] i.MX: Split EPIT emulator in a header file and a source file Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 16/27] i.MX: Fix Coding style for EPIT emulator Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 17/27] i.MX: Split GPT emulator in a header file and a source file Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 18/27] i.MX: Fix Coding style for GPT emulator Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 19/27] Merge memory_region_init_reservation() into memory_region_init_io() Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 20/27] hw/arm/gic: Kill code duplication Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 21/27] Introduce gic_class_name() instead of repeating condition Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 22/27] target-arm: Add debug check for mismatched cpreg resets Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 23/27] target-arm: Add the AArch64 view of the Secure physical timer Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 24/27] target-arm: Add AArch32 banked register access to secure " Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 25/27] hw/arm/virt: Wire up secure timer interrupt Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 26/27] hw/cpu/a15mpcore: Wire up hyp and secure physical timer interrupts Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 27/27] i.MX: Fix UART driver to work with unitialized "chardev" device Peter Maydell
2015-08-13 14:06 ` [Qemu-devel] [PULL 00/27] target-arm queue Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1439462687-26903-11-git-send-email-peter.maydell@linaro.org \
    --to=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).