From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 21/27] Introduce gic_class_name() instead of repeating condition
Date: Thu, 13 Aug 2015 11:44:41 +0100 [thread overview]
Message-ID: <1439462687-26903-22-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1439462687-26903-1-git-send-email-peter.maydell@linaro.org>
From: Pavel Fedin <p.fedin@samsung.com>
This small inline returns correct GIC class name depending on whether we
use KVM acceleration or not. Avoids duplicating the condition everywhere.
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 4f26901be9b844b563673ce3ad08eeedbb7a7132.1438758065.git.p.fedin@samsung.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/virt.c | 7 +++----
hw/cpu/a15mpcore.c | 8 ++------
target-arm/kvm_arm.h | 5 +++++
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index aab99f7..94694d6 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -49,6 +49,7 @@
#include "hw/platform-bus.h"
#include "hw/arm/fdt.h"
#include "hw/intc/arm_gic_common.h"
+#include "kvm_arm.h"
/* Number of external interrupt lines to configure the GIC with */
#define NUM_IRQS 256
@@ -366,12 +367,10 @@ static void create_gic(VirtBoardInfo *vbi, qemu_irq *pic)
/* We create a standalone GIC v2 */
DeviceState *gicdev;
SysBusDevice *gicbusdev;
- const char *gictype = "arm_gic";
+ const char *gictype;
int i;
- if (kvm_irqchip_in_kernel()) {
- gictype = "kvm-arm-gic";
- }
+ gictype = gic_class_name();
gicdev = qdev_create(NULL, gictype);
qdev_prop_set_uint32(gicdev, "revision", 2);
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index acc419e..e31a1f9 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -20,6 +20,7 @@
#include "hw/cpu/a15mpcore.h"
#include "sysemu/kvm.h"
+#include "kvm_arm.h"
static void a15mp_priv_set_irq(void *opaque, int irq, int level)
{
@@ -33,16 +34,11 @@ static void a15mp_priv_initfn(Object *obj)
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
A15MPPrivState *s = A15MPCORE_PRIV(obj);
DeviceState *gicdev;
- const char *gictype = "arm_gic";
-
- if (kvm_irqchip_in_kernel()) {
- gictype = "kvm-arm-gic";
- }
memory_region_init(&s->container, obj, "a15mp-priv-container", 0x8000);
sysbus_init_mmio(sbd, &s->container);
- object_initialize(&s->gic, sizeof(s->gic), gictype);
+ object_initialize(&s->gic, sizeof(s->gic), gic_class_name());
gicdev = DEVICE(&s->gic);
qdev_set_parent_bus(gicdev, sysbus_get_default());
qdev_prop_set_uint32(gicdev, "revision", 2);
diff --git a/target-arm/kvm_arm.h b/target-arm/kvm_arm.h
index 7912d74..b3e0ab7 100644
--- a/target-arm/kvm_arm.h
+++ b/target-arm/kvm_arm.h
@@ -191,4 +191,9 @@ int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu);
#endif
+static inline const char *gic_class_name(void)
+{
+ return kvm_irqchip_in_kernel() ? "kvm-arm-gic" : "arm_gic";
+}
+
#endif
--
1.9.1
next prev parent reply other threads:[~2015-08-13 10:45 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-13 10:44 [Qemu-devel] [PULL 00/27] target-arm queue Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 01/27] target-arm: Add CNTVOFF_EL2 Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 02/27] target-arm: Add CNTHCTL_EL2 Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 03/27] target-arm: Rename and move gt_cnt_reset Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 04/27] target-arm: Pass timeridx as argument to various timer functions Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 05/27] target-arm: Add the Hypervisor timer Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 06/27] hw/arm/virt: Replace magic IRQ constants with macros Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 07/27] hw/arm/virt: Connect the Hypervisor timer Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 08/27] i.MX: Split UART emulator in a header file and a source file Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 09/27] i.MX: Move serial initialization to init/realize of DeviceClass Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 10/27] i.MX:Fix Coding style for UART emulator Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 11/27] i.MX: Split AVIC emulator in a header file and a source file Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 12/27] i.MX: Fix Coding style for AVIC emulator Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 13/27] i.MX: Split CCM emulator in a header file and a source file Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 14/27] i.MX: Fix Coding style for CCM emulator Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 15/27] i.MX: Split EPIT emulator in a header file and a source file Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 16/27] i.MX: Fix Coding style for EPIT emulator Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 17/27] i.MX: Split GPT emulator in a header file and a source file Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 18/27] i.MX: Fix Coding style for GPT emulator Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 19/27] Merge memory_region_init_reservation() into memory_region_init_io() Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 20/27] hw/arm/gic: Kill code duplication Peter Maydell
2015-08-13 10:44 ` Peter Maydell [this message]
2015-08-13 10:44 ` [Qemu-devel] [PULL 22/27] target-arm: Add debug check for mismatched cpreg resets Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 23/27] target-arm: Add the AArch64 view of the Secure physical timer Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 24/27] target-arm: Add AArch32 banked register access to secure " Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 25/27] hw/arm/virt: Wire up secure timer interrupt Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 26/27] hw/cpu/a15mpcore: Wire up hyp and secure physical timer interrupts Peter Maydell
2015-08-13 10:44 ` [Qemu-devel] [PULL 27/27] i.MX: Fix UART driver to work with unitialized "chardev" device Peter Maydell
2015-08-13 14:06 ` [Qemu-devel] [PULL 00/27] target-arm queue Peter Maydell
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