[Qemu-devel] [PULL 0/4] target-mips queue

[Leon Alrae <leon.alrae@imgtec.com>]

Hi,

First target-mips pull request for 2.5 consisting of patches sent during
2.4 freeze.

Thanks,
Leon

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>

The following changes since commit ca0e5d8b0d065a95d0f9042f71b2ace45b015596:

  Open 2.5 development tree (2015-08-11 23:15:55 +0100)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20150813

for you to fetch changes up to c85570163bdf1ba29cb52a63f22ff1c48f1b9398:

  target-mips: Use CPU_LOG_INT for logging related to interrupts (2015-08-13 16:22:53 +0100)

----------------------------------------------------------------
MIPS patches 2015-08-13

Changes:
* mips32r5-generic CPU updated and renamed to P5600
* improvements in LWL/LDL, logging and fulong2e

----------------------------------------------------------------
Aurelien Jarno (1):
      target-mips: simplify LWL/LDL mask generation

Peter Maydell (1):
      hw/pci-host/bonito: Avoid buffer overrun for bad LDMA/COP accesses

Richard Henderson (1):
      target-mips: Use CPU_LOG_INT for logging related to interrupts

Yongbok Kim (1):
      target-mips: update mips32r5-generic into P5600

 hw/pci-host/bonito.c         | 16 +++++++++++++
 target-mips/cpu.h            |  2 +-
 target-mips/helper.c         | 30 +++++++++----------------
 target-mips/op_helper.c      |  3 ++-
 target-mips/translate.c      | 14 +++++-------
 target-mips/translate_init.c | 53 ++++++++++++++++++++++++--------------------
 6 files changed, 65 insertions(+), 53 deletions(-)