[Qemu-devel] [mttcg RFC v4 0/6] Atomic slow-path for mttcg

[Alvise Rigo <a.rigo@virtualopensystems.com>]

This is just an update with the relevant patches needed to port the v4
of "Slow-path for atomic instruction translation" to mttcg v7.
The full source code is available at the following GIT repository:
https://git.virtualopensystems.com/dev/qemu-mt.git
branch:
slowpath-for-atomic-v4-mttcg

The [PATCH 6/6] is the first step to use runtime helpers in place of the
TCG load/store instructions as suggested by Aurelien Jarno.

The patch-series addresses also some of the Paolo's comments, however
the exclusive bitmap is still using one bit for each vCPU.

Alvise Rigo (6):
  cpus: async_run_on_cpu: kick only if needed
  cputlb: wrap tlb_flush with the a new function
  exec: ram_addr: Fix exclusive bitmap accessor
  softmmu_llsc_template.h: move to multithreading
  softmmu_template.h: move to multithreading
  target-arm: Use a runtime helper for excl accesses

 cpus.c                  |  4 +++-
 cputlb.c                | 25 ++++++++++++++++----
 include/exec/exec-all.h |  1 +
 include/exec/ram_addr.h | 61 +++++++++++++++++++++++++++++++++++++++++--------
 include/qom/cpu.h       |  4 ++++
 softmmu_llsc_template.h | 59 +++++++++++++++++++++++++++++++++++------------
 softmmu_template.h      | 36 ++++++++++++++++++++++++-----
 target-arm/helper.h     |  2 ++
 target-arm/op_helper.c  | 11 +++++++++
 target-arm/translate.c  | 12 +++++++++-
 10 files changed, 177 insertions(+), 38 deletions(-)

-- 
2.5.0