From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49919) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZQHHl-0003xI-EL for qemu-devel@nongnu.org; Fri, 14 Aug 2015 11:52:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZQHHi-0003Wn-5s for qemu-devel@nongnu.org; Fri, 14 Aug 2015 11:52:49 -0400 Received: from mail-wi0-f171.google.com ([209.85.212.171]:33176) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZQHHh-0003Wb-Tl for qemu-devel@nongnu.org; Fri, 14 Aug 2015 11:52:46 -0400 Received: by wijp15 with SMTP id p15so23703942wij.0 for ; Fri, 14 Aug 2015 08:52:45 -0700 (PDT) From: Alvise Rigo Date: Fri, 14 Aug 2015 17:55:31 +0200 Message-Id: <1439567732-14118-6-git-send-email-a.rigo@virtualopensystems.com> In-Reply-To: <1439567732-14118-1-git-send-email-a.rigo@virtualopensystems.com> References: <1439567732-14118-1-git-send-email-a.rigo@virtualopensystems.com> Subject: [Qemu-devel] [mttcg RFC v4 5/6] softmmu_template.h: move to multithreading List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, mttcg@listserver.greensocs.com Cc: claudio.fontana@huawei.com, pbonzini@redhat.com, jani.kokkonen@huawei.com, tech@virtualopensystems.com, alex.bennee@linaro.org, aurelien@aurel32.net Exploiting the tcg_excl_access_lock, port the helper_{le,be}_st_name to work in real multithreading. Suggested-by: Jani Kokkonen Suggested-by: Claudio Fontana Signed-off-by: Alvise Rigo --- softmmu_template.h | 36 ++++++++++++++++++++++++++++++------ 1 file changed, 30 insertions(+), 6 deletions(-) diff --git a/softmmu_template.h b/softmmu_template.h index ad65d20..514aeb7 100644 --- a/softmmu_template.h +++ b/softmmu_template.h @@ -418,20 +418,29 @@ void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, * exclusive-protected memory. */ hwaddr hw_addr = (iotlbentry->addr & TARGET_PAGE_MASK) + addr; + qemu_mutex_lock(&tcg_excl_access_lock); /* The function lookup_and_reset_cpus_ll_addr could have reset the * exclusive address. Fail the SC in this case. * N.B.: Here excl_succeeded == 0 means that helper_le_st_name has * not been called by a softmmu_llsc_template.h. */ if(env->excl_succeeded) { - if (env->excl_protected_range.begin != hw_addr) { - /* The vCPU is SC-ing to an unprotected address. */ + if (!((env->excl_protected_range.begin == hw_addr) && + env->excl_protected_range.end == (hw_addr + DATA_SIZE))) { + /* The vCPU is SC-ing to an unprotected address. This + * can also happen when a vCPU stores to the address. + * */ env->excl_protected_range.begin = EXCLUSIVE_RESET_ADDR; env->excl_succeeded = 0; + qemu_mutex_unlock(&tcg_excl_access_lock); + return; } - cpu_physical_memory_set_excl_dirty(hw_addr, ENV_GET_CPU(env)->cpu_index); + /* Now we are going for sure to complete the access. Set the + * bit to dirty. */ + cpu_physical_memory_set_excl_dirty(hw_addr, + ENV_GET_CPU(env)->cpu_index); } haddr = addr + env->tlb_table[mmu_idx][index].addend; @@ -441,8 +450,11 @@ void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, glue(glue(st, SUFFIX), _le_p)((uint8_t *)haddr, val); #endif + /* This will reset the excl address also for the current vCPU. */ lookup_and_reset_cpus_ll_addr(hw_addr, DATA_SIZE); + qemu_mutex_unlock(&tcg_excl_access_lock); + return; } else { if ((addr & (DATA_SIZE - 1)) != 0) { @@ -532,20 +544,29 @@ void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, * exclusive-protected memory. */ hwaddr hw_addr = (iotlbentry->addr & TARGET_PAGE_MASK) + addr; + qemu_mutex_lock(&tcg_excl_access_lock); /* The function lookup_and_reset_cpus_ll_addr could have reset the * exclusive address. Fail the SC in this case. * N.B.: Here excl_succeeded == 0 means that helper_le_st_name has * not been called by a softmmu_llsc_template.h. */ if(env->excl_succeeded) { - if (env->excl_protected_range.begin != hw_addr) { - /* The vCPU is SC-ing to an unprotected address. */ + if (!((env->excl_protected_range.begin == hw_addr) && + env->excl_protected_range.end == (hw_addr + DATA_SIZE))) { + /* The vCPU is SC-ing to an unprotected address. This + * can also happen when a vCPU stores to the address. + * */ env->excl_protected_range.begin = EXCLUSIVE_RESET_ADDR; env->excl_succeeded = 0; + qemu_mutex_unlock(&tcg_excl_access_lock); + return; } - cpu_physical_memory_set_excl_dirty(hw_addr, ENV_GET_CPU(env)->cpu_index); + /* Now we are going for sure to complete the access. Set the + * bit to dirty. */ + cpu_physical_memory_set_excl_dirty(hw_addr, + ENV_GET_CPU(env)->cpu_index); } haddr = addr + env->tlb_table[mmu_idx][index].addend; @@ -555,8 +576,11 @@ void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, glue(glue(st, SUFFIX), _le_p)((uint8_t *)haddr, val); #endif + /* This will reset the excl address also for the current vCPU. */ lookup_and_reset_cpus_ll_addr(hw_addr, DATA_SIZE); + qemu_mutex_unlock(&tcg_excl_access_lock); + return; } else { if ((addr & (DATA_SIZE - 1)) != 0) { -- 2.5.0