From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
qemu-ppc@nongnu.org, Alexander Graf <agraf@suse.de>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH 1/5] ppc: Remove MMU_MODEn_SUFFIX definitions
Date: Mon, 17 Aug 2015 17:34:09 +1000 [thread overview]
Message-ID: <1439796853-4410-1-git-send-email-benh@kernel.crashing.org> (raw)
We don't use the resulting accessors and this gets in the way of
the split I/D TLB work.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
target-ppc/cpu.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 6f76674..5dfd195 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1246,9 +1246,6 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val);
#define cpu_list ppc_cpu_list
/* MMU modes definitions */
-#define MMU_MODE0_SUFFIX _user
-#define MMU_MODE1_SUFFIX _kernel
-#define MMU_MODE2_SUFFIX _hypv
#define MMU_USER_IDX 0
static inline int cpu_mmu_index (CPUPPCState *env)
{
--
2.4.3
next reply other threads:[~2015-08-17 7:35 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-17 7:34 Benjamin Herrenschmidt [this message]
2015-08-17 7:34 ` [Qemu-devel] [PATCH 2/5] tlb: Add "ifetch" argument to cpu_mmu_index() Benjamin Herrenschmidt
2015-08-17 7:34 ` [Qemu-devel] [PATCH 3/5] ppc: Use split I/D mmu modes to avoid flushes on interrupts Benjamin Herrenschmidt
2015-08-17 7:34 ` [Qemu-devel] [PATCH 4/5] ppc: Do some batching of TCG tlb flushes Benjamin Herrenschmidt
2015-08-17 7:34 ` [Qemu-devel] [PATCH 5/5] tcg/ppc: Improve unaligned load/store handling on 64-bit backend Benjamin Herrenschmidt
2015-08-17 8:16 ` Benjamin Herrenschmidt
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