From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49080) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZSewg-0001k6-Dh for qemu-devel@nongnu.org; Fri, 21 Aug 2015 01:32:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZSewf-0001Dc-HZ for qemu-devel@nongnu.org; Fri, 21 Aug 2015 01:32:54 -0400 Received: from mail-pd0-x22b.google.com ([2607:f8b0:400e:c02::22b]:34184) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZSewf-0001DN-Bp for qemu-devel@nongnu.org; Fri, 21 Aug 2015 01:32:53 -0400 Received: by pdbfa8 with SMTP id fa8so22569701pdb.1 for ; Thu, 20 Aug 2015 22:32:52 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Thu, 20 Aug 2015 22:32:36 -0700 Message-Id: <1440135164-23526-7-git-send-email-rth@twiddle.net> In-Reply-To: <1440135164-23526-1-git-send-email-rth@twiddle.net> References: <1440135164-23526-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v13r 06/14] target-tilegx: Modify _SPECIAL_ opcodes List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, cmetcalf@ezchip.com, xili_gchen_5257@hotmail.com, walt@tilera.com Both ADDX_SPECIAL_0_OPCODE_Y1 and ADD_SPECIAL_0_OPCODE_Y1 do not appear to be "special" in any way, except that they don't follow the normal naming convention using _RRR_. Signed-off-by: Richard Henderson --- target-tilegx/opcode_tilegx.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-tilegx/opcode_tilegx.h b/target-tilegx/opcode_tilegx.h index 33b71a9..3b8bf4f 100644 --- a/target-tilegx/opcode_tilegx.h +++ b/target-tilegx/opcode_tilegx.h @@ -830,11 +830,11 @@ enum ADDX_RRR_0_OPCODE_X0 = 2, ADDX_RRR_0_OPCODE_X1 = 2, ADDX_RRR_0_OPCODE_Y0 = 0, - ADDX_SPECIAL_0_OPCODE_Y1 = 0, + ADDX_RRR_0_OPCODE_Y1 = 0, ADD_RRR_0_OPCODE_X0 = 3, ADD_RRR_0_OPCODE_X1 = 3, ADD_RRR_0_OPCODE_Y0 = 1, - ADD_SPECIAL_0_OPCODE_Y1 = 1, + ADD_RRR_0_OPCODE_Y1 = 1, ANDI_IMM8_OPCODE_X0 = 3, ANDI_IMM8_OPCODE_X1 = 3, ANDI_OPCODE_Y0 = 2, -- 2.4.3