From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32898) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTfZ4-0006vL-4Y for qemu-devel@nongnu.org; Sun, 23 Aug 2015 20:24:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZTfZ2-0000hp-Jg for qemu-devel@nongnu.org; Sun, 23 Aug 2015 20:24:42 -0400 Received: from out4-smtp.messagingengine.com ([66.111.4.28]:54409) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTfZ2-0000hf-Gr for qemu-devel@nongnu.org; Sun, 23 Aug 2015 20:24:40 -0400 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 69B0D2086D for ; Sun, 23 Aug 2015 20:24:40 -0400 (EDT) From: "Emilio G. Cota" Date: Sun, 23 Aug 2015 20:23:47 -0400 Message-Id: <1440375847-17603-19-git-send-email-cota@braap.org> In-Reply-To: <1440375847-17603-1-git-send-email-cota@braap.org> References: <1440375847-17603-1-git-send-email-cota@braap.org> Subject: [Qemu-devel] [RFC 18/38] tcg: add fences List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, mttcg@listserver.greensocs.com Cc: mark.burton@greensocs.com, a.rigo@virtualopensystems.com, guillaume.delbergue@greensocs.com, pbonzini@redhat.com, alex.bennee@linaro.org, Frederic Konrad Signed-off-by: Emilio G. Cota --- tcg/tcg-op.c | 5 +++++ tcg/tcg-op.h | 18 ++++++++++++++++++ tcg/tcg-opc.h | 5 +++++ 3 files changed, 28 insertions(+) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 45098c3..6d5b1df 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -57,6 +57,11 @@ static void tcg_emit_op(TCGContext *ctx, TCGOpcode opc, int args) }; } +void tcg_gen_op0(TCGContext *ctx, TCGOpcode opc) +{ + tcg_emit_op(ctx, opc, -1); +} + void tcg_gen_op1(TCGContext *ctx, TCGOpcode opc, TCGArg a1) { int pi = ctx->gen_next_parm_idx; diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index d1d763f..52482c0 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -28,6 +28,7 @@ /* Basic output routines. Not for general consumption. */ +void tcg_gen_op0(TCGContext *, TCGOpcode); void tcg_gen_op1(TCGContext *, TCGOpcode, TCGArg); void tcg_gen_op2(TCGContext *, TCGOpcode, TCGArg, TCGArg); void tcg_gen_op3(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg); @@ -698,6 +699,23 @@ static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg) tcg_gen_trunc_shr_i64_i32(ret, arg, 0); } +/* fences */ + +static inline void tcg_gen_fence_load(void) +{ + tcg_gen_op0(&tcg_ctx, INDEX_op_fence_load); +} + +static inline void tcg_gen_fence_store(void) +{ + tcg_gen_op0(&tcg_ctx, INDEX_op_fence_store); +} + +static inline void tcg_gen_fence_full(void) +{ + tcg_gen_op0(&tcg_ctx, INDEX_op_fence_full); +} + /* QEMU specific operations. */ #ifndef TARGET_LONG_BITS diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index 13ccb60..85de953 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -167,6 +167,11 @@ DEF(muls2_i64, 2, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_muls2_i64)) DEF(muluh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_muluh_i64)) DEF(mulsh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i64)) +/* fences */ +DEF(fence_load, 0, 0, 0, 0) +DEF(fence_store, 0, 0, 0, 0) +DEF(fence_full, 0, 0, 0, 0) + /* QEMU specific */ #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS DEF(debug_insn_start, 0, 0, 2, TCG_OPF_NOT_PRESENT) -- 1.9.1