From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37855) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTuT4-0003cw-M7 for qemu-devel@nongnu.org; Mon, 24 Aug 2015 12:19:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZTuT0-00036D-El for qemu-devel@nongnu.org; Mon, 24 Aug 2015 12:19:30 -0400 Received: from mail-qk0-x230.google.com ([2607:f8b0:400d:c09::230]:33892) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTuT0-00035y-Br for qemu-devel@nongnu.org; Mon, 24 Aug 2015 12:19:26 -0400 Received: by qkfh127 with SMTP id h127so74426996qkf.1 for ; Mon, 24 Aug 2015 09:19:26 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Mon, 24 Aug 2015 09:17:53 -0700 Message-Id: <1440433079-14458-28-git-send-email-rth@twiddle.net> In-Reply-To: <1440433079-14458-1-git-send-email-rth@twiddle.net> References: <1440433079-14458-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v14 27/33] target-tilegx: Handle mask instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: walt@tilera.com, cmetcalf@ezchip.com, xili_gchen_5257@hotmail.com, peter.maydell@linaro.org Signed-off-by: Richard Henderson --- target-tilegx/translate.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index 51ee158..af4b34a 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -647,11 +647,15 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(FSINGLE_MUL2, 0, X0): case OE_RRR(FSINGLE_PACK2, 0, X0): case OE_RRR(FSINGLE_SUB1, 0, X0): + return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(MNZ, 0, X0): case OE_RRR(MNZ, 0, X1): case OE_RRR(MNZ, 4, Y0): case OE_RRR(MNZ, 4, Y1): - return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; + t0 = load_zero(dc); + tcg_gen_movcond_tl(TCG_COND_NE, tdest, tsrca, t0, tsrcb, t0); + mnemonic = "mnz"; + break; case OE_RRR(MULAX, 0, X0): case OE_RRR(MULAX, 3, Y0): tcg_gen_mul_tl(tdest, tsrca, tsrcb); @@ -767,7 +771,10 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(MZ, 0, X1): case OE_RRR(MZ, 4, Y0): case OE_RRR(MZ, 4, Y1): - return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; + t0 = load_zero(dc); + tcg_gen_movcond_tl(TCG_COND_EQ, tdest, tsrca, t0, tsrcb, t0); + mnemonic = "mz"; + break; case OE_RRR(NOR, 0, X0): case OE_RRR(NOR, 0, X1): case OE_RRR(NOR, 5, Y0): -- 2.4.3