From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37914) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTuT9-0003lx-De for qemu-devel@nongnu.org; Mon, 24 Aug 2015 12:19:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZTuT8-0003G5-Mj for qemu-devel@nongnu.org; Mon, 24 Aug 2015 12:19:35 -0400 Received: from mail-qg0-x22d.google.com ([2607:f8b0:400d:c04::22d]:35634) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTuT8-0003EH-Ik for qemu-devel@nongnu.org; Mon, 24 Aug 2015 12:19:34 -0400 Received: by qgj62 with SMTP id 62so89611443qgj.2 for ; Mon, 24 Aug 2015 09:19:32 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Mon, 24 Aug 2015 09:17:57 -0700 Message-Id: <1440433079-14458-32-git-send-email-rth@twiddle.net> In-Reply-To: <1440433079-14458-1-git-send-email-rth@twiddle.net> References: <1440433079-14458-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v14 31/33] target-tilegx: Handle v4int_l/h List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: walt@tilera.com, cmetcalf@ezchip.com, xili_gchen_5257@hotmail.com, peter.maydell@linaro.org Signed-off-by: Richard Henderson --- target-tilegx/translate.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index 2a0798a..e922aee 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -1125,10 +1125,18 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(V4ADDSC, 0, X1): case OE_RRR(V4ADD, 0, X0): case OE_RRR(V4ADD, 0, X1): + return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V4INT_H, 0, X0): case OE_RRR(V4INT_H, 0, X1): + tcg_gen_shri_tl(tdest, tsrcb, 32); + tcg_gen_deposit_tl(tdest, tsrca, tdest, 0, 32); + mnemonic = "v4int_h"; + break; case OE_RRR(V4INT_L, 0, X0): case OE_RRR(V4INT_L, 0, X1): + tcg_gen_deposit_tl(tdest, tsrcb, tsrca, 32, 32); + mnemonic = "v4int_l"; + break; case OE_RRR(V4PACKSC, 0, X0): case OE_RRR(V4PACKSC, 0, X1): case OE_RRR(V4SHLSC, 0, X0): -- 2.4.3