From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50931) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTxZ5-0000rM-PR for qemu-devel@nongnu.org; Mon, 24 Aug 2015 15:37:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZTxZ4-0005YR-NB for qemu-devel@nongnu.org; Mon, 24 Aug 2015 15:37:55 -0400 Received: from mail-qk0-x22a.google.com ([2607:f8b0:400d:c09::22a]:34198) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTxZ4-0005YN-IR for qemu-devel@nongnu.org; Mon, 24 Aug 2015 15:37:54 -0400 Received: by qkfh127 with SMTP id h127so84385501qkf.1 for ; Mon, 24 Aug 2015 12:37:54 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Mon, 24 Aug 2015 12:36:57 -0700 Message-Id: <1440445026-26522-10-git-send-email-rth@twiddle.net> In-Reply-To: <1440445026-26522-1-git-send-email-rth@twiddle.net> References: <1440445026-26522-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 09/18] tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Aurelien Jarno From: Aurelien Jarno They behave the same as ext32s_i64 and ext32u_i64 from the constant folding and zero propagation point of view, except that they can't be replaced by a mov, so we don't compute the affected value. Signed-off-by: Aurelien Jarno Signed-off-by: Richard Henderson --- tcg/optimize.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/tcg/optimize.c b/tcg/optimize.c index 47f4147..1804605 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -343,9 +343,11 @@ static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) CASE_OP_32_64(ext16u): return (uint16_t)x; + case INDEX_op_ext_i32_i64: case INDEX_op_ext32s_i64: return (int32_t)x; + case INDEX_op_extu_i32_i64: case INDEX_op_ext32u_i64: return (uint32_t)x; @@ -837,6 +839,15 @@ void tcg_optimize(TCGContext *s) mask = temps[args[1]].mask & mask; break; + case INDEX_op_ext_i32_i64: + if ((temps[args[1]].mask & 0x80000000) != 0) { + break; + } + case INDEX_op_extu_i32_i64: + /* We do not compute affected as it is a size changing op. */ + mask = (uint32_t)temps[args[1]].mask; + break; + CASE_OP_32_64(andc): /* Known-zeros does not imply known-ones. Therefore unless args[2] is constant, we can't infer anything from it. */ @@ -1015,6 +1026,8 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(ext16u): case INDEX_op_ext32s_i64: case INDEX_op_ext32u_i64: + case INDEX_op_ext_i32_i64: + case INDEX_op_extu_i32_i64: if (temp_is_const(args[1])) { tmp = do_constant_folding(opc, temps[args[1]].val, 0); tcg_opt_gen_movi(s, op, args, args[0], tmp); -- 2.4.3