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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PULL 01/18] tcg/optimize: fix constant signedness
Date: Mon, 24 Aug 2015 12:36:49 -0700	[thread overview]
Message-ID: <1440445026-26522-2-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1440445026-26522-1-git-send-email-rth@twiddle.net>

From: Aurelien Jarno <aurelien@aurel32.net>

By convention, on a 64-bit host TCG internally stores 32-bit constants
as sign-extended. This is not the case in the optimizer when a 32-bit
constant is folded.

This doesn't seem to have more consequences than suboptimal code
generation. For instance the x86 backend assumes sign-extended constants,
and in some rare cases uses a 32-bit unsigned immediate 0xffffffff
instead of a 8-bit signed immediate 0xff for the constant -1. This is
with a ppc guest:

before
------

 ---- 0x9f29cc
 movi_i32 tmp1,$0xffffffff
 movi_i32 tmp2,$0x0
 add2_i32 tmp0,CA,CA,tmp2,r6,tmp2
 add2_i32 tmp0,CA,tmp0,CA,tmp1,tmp2
 mov_i32 r10,tmp0

0x7fd8c7dfe90c:  xor    %ebp,%ebp
0x7fd8c7dfe90e:  mov    %ebp,%r11d
0x7fd8c7dfe911:  mov    0x18(%r14),%r9d
0x7fd8c7dfe915:  add    %r9d,%r10d
0x7fd8c7dfe918:  adc    %ebp,%r11d
0x7fd8c7dfe91b:  add    $0xffffffff,%r10d
0x7fd8c7dfe922:  adc    %ebp,%r11d
0x7fd8c7dfe925:  mov    %r11d,0x134(%r14)
0x7fd8c7dfe92c:  mov    %r10d,0x28(%r14)

after
-----

 ---- 0x9f29cc
 movi_i32 tmp1,$0xffffffffffffffff
 movi_i32 tmp2,$0x0
 add2_i32 tmp0,CA,CA,tmp2,r6,tmp2
 add2_i32 tmp0,CA,tmp0,CA,tmp1,tmp2
 mov_i32 r10,tmp0

0x7f37010d490c:  xor    %ebp,%ebp
0x7f37010d490e:  mov    %ebp,%r11d
0x7f37010d4911:  mov    0x18(%r14),%r9d
0x7f37010d4915:  add    %r9d,%r10d
0x7f37010d4918:  adc    %ebp,%r11d
0x7f37010d491b:  add    $0xffffffffffffffff,%r10d
0x7f37010d491f:  adc    %ebp,%r11d
0x7f37010d4922:  mov    %r11d,0x134(%r14)
0x7f37010d4929:  mov    %r10d,0x28(%r14)

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-Id: <1436544211-2769-2-git-send-email-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/optimize.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/tcg/optimize.c b/tcg/optimize.c
index 18283cf..cd0e793 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -395,7 +395,7 @@ static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y)
 {
     TCGArg res = do_constant_folding_2(op, x, y);
     if (op_bits(op) == 32) {
-        res &= 0xffffffff;
+        res = (int32_t)res;
     }
     return res;
 }
@@ -1128,8 +1128,8 @@ void tcg_optimize(TCGContext *s)
 
                 rl = args[0];
                 rh = args[1];
-                tcg_opt_gen_movi(s, op, args, rl, (uint32_t)a);
-                tcg_opt_gen_movi(s, op2, args2, rh, (uint32_t)(a >> 32));
+                tcg_opt_gen_movi(s, op, args, rl, (int32_t)a);
+                tcg_opt_gen_movi(s, op2, args2, rh, (int32_t)(a >> 32));
 
                 /* We've done all we need to do with the movi.  Skip it.  */
                 oi_next = op2->next;
@@ -1149,8 +1149,8 @@ void tcg_optimize(TCGContext *s)
 
                 rl = args[0];
                 rh = args[1];
-                tcg_opt_gen_movi(s, op, args, rl, (uint32_t)r);
-                tcg_opt_gen_movi(s, op2, args2, rh, (uint32_t)(r >> 32));
+                tcg_opt_gen_movi(s, op, args, rl, (int32_t)r);
+                tcg_opt_gen_movi(s, op2, args2, rh, (int32_t)(r >> 32));
 
                 /* We've done all we need to do with the movi.  Skip it.  */
                 oi_next = op2->next;
-- 
2.4.3

  reply	other threads:[~2015-08-24 19:37 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-24 19:36 [Qemu-devel] [PULL 00/18] Queued TCG patches Richard Henderson
2015-08-24 19:36 ` Richard Henderson [this message]
2015-08-24 19:36 ` [Qemu-devel] [PULL 02/18] tcg/optimize: optimize temps tracking Richard Henderson
2015-08-24 19:36 ` [Qemu-devel] [PULL 03/18] tcg/optimize: add temp_is_const and temp_is_copy functions Richard Henderson
2015-08-24 19:36 ` [Qemu-devel] [PULL 04/18] tcg/optimize: track const/copy status separately Richard Henderson
2015-08-24 19:36 ` [Qemu-devel] [PULL 05/18] tcg/optimize: allow constant to have copies Richard Henderson
2015-08-24 19:36 ` [Qemu-devel] [PULL 06/18] tcg: rename trunc_shr_i32 into trunc_shr_i64_i32 Richard Henderson
2015-08-24 19:36 ` [Qemu-devel] [PULL 07/18] tcg: don't abuse TCG type in tcg_gen_trunc_shr_i64_i32 Richard Henderson
2015-08-24 19:36 ` [Qemu-devel] [PULL 08/18] tcg: implement real ext_i32_i64 and extu_i32_i64 ops Richard Henderson
2015-08-24 19:36 ` [Qemu-devel] [PULL 09/18] tcg/optimize: add optimizations for " Richard Henderson
2015-08-24 19:36 ` [Qemu-devel] [PULL 10/18] tcg: update README about size changing ops Richard Henderson
2015-08-24 19:36 ` [Qemu-devel] [PULL 11/18] tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32 Richard Henderson
2015-08-24 19:37 ` [Qemu-devel] [PULL 13/18] tcg/i386: use softmmu fast path for unaligned accesses Richard Henderson
2015-08-24 19:37 ` [Qemu-devel] [PULL 14/18] tcg/ppc: Improve unaligned load/store handling on 64-bit backend Richard Henderson
2015-08-24 19:37 ` [Qemu-devel] [PULL 15/18] tcg/s390: Use softmmu fast path for unaligned accesses Richard Henderson
2015-08-24 19:37 ` [Qemu-devel] [PULL 16/18] tcg/aarch64: " Richard Henderson
2015-08-24 19:37 ` [Qemu-devel] [PULL 17/18] linux-user: remove --enable-guest-base/--disable-guest-base Richard Henderson
2015-08-24 19:37 ` [Qemu-devel] [PULL 18/18] linux-user: remove useless macros GUEST_BASE and RESERVED_VA Richard Henderson
2015-08-28  8:21   ` Cornelia Huck
2015-08-28  8:33     ` Laurent Vivier
2015-08-28  8:55       ` Cornelia Huck
2015-08-25 14:33 ` [Qemu-devel] [PULL 00/18] Queued TCG patches Peter Maydell

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