From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41311) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZUOPe-0002Zz-R9 for qemu-devel@nongnu.org; Tue, 25 Aug 2015 20:17:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZUOPc-0000LC-IX for qemu-devel@nongnu.org; Tue, 25 Aug 2015 20:17:58 -0400 Received: from mail-wi0-x22b.google.com ([2a00:1450:400c:c05::22b]:33712) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZUOPc-0000Kq-C1 for qemu-devel@nongnu.org; Tue, 25 Aug 2015 20:17:56 -0400 Received: by wijn1 with SMTP id n1so8253011wij.0 for ; Tue, 25 Aug 2015 17:17:55 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Date: Wed, 26 Aug 2015 02:17:39 +0200 Message-Id: <1440548265-4755-4-git-send-email-pbonzini@redhat.com> In-Reply-To: <1440548265-4755-1-git-send-email-pbonzini@redhat.com> References: <1440548265-4755-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH 3/9] tcg: introduce tcg_current_cpu List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: mttcg@greensocs.com, cota@braap.org, rth@twiddle.net This is already useful on Windows in order to remove tls.h, because accesses to current_cpu are done from a different thread on that platform. It will be used on POSIX platforms as soon TCG stops using signals to interrupt the execution of translated code. Signed-off-by: Paolo Bonzini --- cpu-exec.c | 14 +++++--------- cpus.c | 5 +++-- include/exec/exec-all.h | 1 + 3 files changed, 9 insertions(+), 11 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index 58144b4..2c3cb7d 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -382,6 +382,7 @@ static void cpu_handle_debug_exception(CPUState *cpu) /* main execution loop */ volatile sig_atomic_t exit_request; +CPUState *tcg_current_cpu; int cpu_exec(CPUState *cpu) { @@ -405,15 +406,7 @@ int cpu_exec(CPUState *cpu) } current_cpu = cpu; - - /* As long as current_cpu is null, up to the assignment just above, - * requests by other threads to exit the execution loop are expected to - * be issued using the exit_request global. We must make sure that our - * evaluation of the global value is performed past the current_cpu - * value transition point, which requires a memory barrier as well as - * an instruction scheduling constraint on modern architectures. */ - smp_mb(); - + atomic_mb_set(&tcg_current_cpu, cpu); rcu_read_lock(); if (unlikely(exit_request)) { @@ -614,5 +607,8 @@ int cpu_exec(CPUState *cpu) /* fail safe : never use current_cpu outside cpu_exec() */ current_cpu = NULL; + + /* Does not need atomic_mb_set because a spurious wakeup is okay. */ + atomic_set(&tcg_current_cpu, NULL); return ret; } diff --git a/cpus.c b/cpus.c index 8884278..ec8168c 100644 --- a/cpus.c +++ b/cpus.c @@ -663,8 +663,9 @@ static void cpu_handle_guest_debug(CPUState *cpu) static void cpu_signal(int sig) { - if (current_cpu) { - cpu_exit(current_cpu); + CPUState *cpu = atomic_mb_read(&tcg_current_cpu); + if (cpu) { + cpu_exit(cpu); } exit_request = 1; } diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index b3f900a..c92d434 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -346,6 +346,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr); extern int singlestep; /* cpu-exec.c */ +extern CPUState *tcg_current_cpu; extern volatile sig_atomic_t exit_request; #endif -- 2.4.3