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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: dl.soluz@gmx.net, atar4qemu@gmail.com, aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH 03/20] tcg: Allow extra data to be attached to insn_start
Date: Tue,  1 Sep 2015 22:51:46 -0700	[thread overview]
Message-ID: <1441173123-25540-4-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1441173123-25540-1-git-send-email-rth@twiddle.net>

With an eye toward having this data replace the gen_opc_* arrays
that each target collects in order to enable restore_state_from_tb.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/tcg-op.h  | 52 ++++++++++++++++++++++++++++++++++++++++++++--------
 tcg/tcg-opc.h |  4 ++--
 tcg/tcg.c     | 14 ++++++++------
 tcg/tcg.h     |  6 ++++++
 4 files changed, 60 insertions(+), 16 deletions(-)

diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index 6409db8..4e20dc1 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -700,17 +700,53 @@ static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
 #error must include QEMU headers
 #endif
 
-/* debug info: write the PC of the corresponding QEMU CPU instruction */
-static inline void tcg_gen_insn_start(uint64_t pc)
+#if TARGET_INSN_START_WORDS == 1
+# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
+static inline void tcg_gen_insn_start(target_ulong pc)
 {
-    /* XXX: must really use a 32 bit size for TCGArg in all cases */
-#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
-    tcg_gen_op2ii(INDEX_op_insn_start,
-                  (uint32_t)(pc), (uint32_t)(pc >> 32));
+    tcg_gen_op1(&tcg_ctx, INDEX_op_insn_start, pc);
+}
+# else
+static inline void tcg_gen_insn_start(target_ulong pc)
+{
+    tcg_gen_op2(&tcg_ctx, INDEX_op_insn_start,
+                (uint32_t)pc, (uint32_t)(pc >> 32));
+}
+# endif
+#elif TARGET_INSN_START_WORDS == 2
+# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
+static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
+{
+    tcg_gen_op2(&tcg_ctx, INDEX_op_insn_start, pc, a1);
+}
+# else
+static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
+{
+    tcg_gen_op4(&tcg_ctx, INDEX_op_insn_start,
+                (uint32_t)pc, (uint32_t)(pc >> 32),
+                (uint32_t)a1, (uint32_t)(a1 >> 32));
+}
+# endif
+#elif TARGET_INSN_START_WORDS == 3
+# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
+static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
+                                      target_ulong a2)
+{
+    tcg_gen_op3(&tcg_ctx, INDEX_op_insn_start, pc, a1, a2);
+}
+# else
+static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
+                                      target_ulong a2)
+{
+    tcg_gen_op6(&tcg_ctx, INDEX_op_insn_start,
+                (uint32_t)pc, (uint32_t)(pc >> 32),
+                (uint32_t)a1, (uint32_t)(a1 >> 32),
+                (uint32_t)a2, (uint32_t)(a2 >> 32));
+}
+# endif
 #else
-    tcg_gen_op1i(INDEX_op_insn_start, pc);
+# error "Unhandled number of operands to insn_start"
 #endif
-}
 
 static inline void tcg_gen_exit_tb(uintptr_t val)
 {
diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h
index f60d3c2..c6f9570 100644
--- a/tcg/tcg-opc.h
+++ b/tcg/tcg-opc.h
@@ -175,9 +175,9 @@ DEF(mulsh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i64))
 
 /* QEMU specific */
 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
-DEF(insn_start, 0, 0, 2, TCG_OPF_NOT_PRESENT)
+DEF(insn_start, 0, 0, 2 * TARGET_INSN_START_WORDS, TCG_OPF_NOT_PRESENT)
 #else
-DEF(insn_start, 0, 0, 1, TCG_OPF_NOT_PRESENT)
+DEF(insn_start, 0, 0, TARGET_INSN_START_WORDS, TCG_OPF_NOT_PRESENT)
 #endif
 DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_END)
 DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_END)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 4087f76..a44b834 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -997,16 +997,18 @@ void tcg_dump_ops(TCGContext *s)
         args = &s->gen_opparam_buf[op->args];
 
         if (c == INDEX_op_insn_start) {
-            uint64_t pc;
+            qemu_log("%s ----", oi != s->gen_first_op_idx ? "\n" : "");
+
+            for (i = 0; i < TARGET_INSN_START_WORDS; ++i) {
+                target_ulong a;
 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
-            pc = ((uint64_t)args[1] << 32) | args[0];
+                a = ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2];
 #else
-            pc = args[0];
+                a = args[i];
 #endif
-            if (oi != s->gen_first_op_idx) {
-                qemu_log("\n");
+                qemu_log(" " TARGET_FMT_lx, a);
+                         
             }
-            qemu_log(" ---- 0x%" PRIx64, pc);
         } else if (c == INDEX_op_call) {
             /* variable number of arguments */
             nb_oargs = op->callo;
diff --git a/tcg/tcg.h b/tcg/tcg.h
index f437824..455c229 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -129,6 +129,12 @@ typedef uint64_t TCGRegSet;
 # error "Missing unsigned widening multiply"
 #endif
 
+#ifndef TARGET_INSN_START_EXTRA_WORDS
+# define TARGET_INSN_START_WORDS 1
+#else
+# define TARGET_INSN_START_WORDS (1 + TARGET_INSN_START_EXTRA_WORDS)
+#endif
+
 typedef enum TCGOpcode {
 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
 #include "tcg-opc.h"
-- 
2.4.3

  parent reply	other threads:[~2015-09-02  5:52 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-02  5:51 [Qemu-devel] [RFC 00/20] Do away with TB retranslation Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 02/20] target-*: Unconditionally emit tcg_gen_insn_start Richard Henderson
2015-09-02  5:51 ` Richard Henderson [this message]
2015-09-08 18:44   ` [Qemu-devel] [PATCH 03/20] tcg: Allow extra data to be attached to insn_start Peter Maydell
2015-09-02  5:51 ` [Qemu-devel] [PATCH 04/20] target-arm: Add condexec state " Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 05/20] target-i386: Add cc_op " Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 06/20] target-mips: Add delayed branch " Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 07/20] target-s390x: Add cc_op " Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 08/20] target-sh4: Add flags " Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 09/20] target-cris: Mirror gen_opc_pc into insn_start Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 10/20] target-sparc: Tidy gen_branch_a interface Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 11/20] target-sparc: Split out gen_branch_n Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 12/20] target-sparc: Remove gen_opc_jump_pc Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 13/20] target-sparc: Add npc state to insn_start Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 14/20] tcg: Merge cpu_gen_code into tb_gen_code Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 15/20] target-*: Drop cpu_gen_code define Richard Henderson
2015-09-02  5:51 ` [Qemu-devel] [PATCH 16/20] tcg: Add TCG_MAX_INSNS Richard Henderson
2015-09-02  5:52 ` [Qemu-devel] [PATCH 17/20] tcg: Pass data argument to restore_state_to_opc Richard Henderson
2015-09-08 18:46   ` Peter Maydell
2015-09-17 19:39     ` Richard Henderson
2015-09-02  5:52 ` [Qemu-devel] [PATCH 18/20] tcg: Save insn data and use it in cpu_restore_state_from_tb Richard Henderson
2015-09-10 13:49   ` Peter Maydell
2015-09-11 10:29     ` Sergey Fedorov
2015-09-11 10:32       ` Peter Maydell
2015-09-11 10:46         ` Sergey Fedorov
2015-09-15 20:08     ` Richard Henderson
2015-09-02  5:52 ` [Qemu-devel] [PATCH 19/20] tcg: Remove gen_intermediate_code_pc Richard Henderson
2015-09-08 18:49   ` Peter Maydell
2015-09-02  5:52 ` [Qemu-devel] [PATCH 20/20] tcg: Remove tcg_gen_code_search_pc Richard Henderson
2015-09-02 12:21 ` [Qemu-devel] [RFC 00/20] Do away with TB retranslation Max Filippov
2015-09-02 14:21   ` Richard Henderson
2015-09-04 15:18     ` Max Filippov
2015-09-04 15:31       ` Peter Maydell
2015-09-04 16:46       ` Richard Henderson
2015-09-04 17:07         ` Max Filippov
2015-09-05 14:11         ` Mark Cave-Ayland
2015-09-06 20:19           ` Richard Henderson
2015-09-09 15:35             ` Artyom Tarasenko
2015-09-08 18:56 ` Peter Maydell
2015-09-08 19:00   ` Richard Henderson
2015-09-08 19:06     ` Peter Maydell
2015-09-08 19:28       ` Richard Henderson
2015-09-08 20:25         ` Peter Maydell
2015-09-09 15:05     ` Artyom Tarasenko
2015-09-09 16:18       ` Paolo Bonzini
2015-09-09 17:48         ` Artyom Tarasenko
2015-09-10  6:07     ` Dennis Luehring
2015-09-10  7:00       ` Artyom Tarasenko
2015-09-10  9:32         ` Dennis Luehring
2015-09-10  9:54           ` Artyom Tarasenko
2015-09-10 10:37             ` Dennis Luehring
2015-09-10 10:57               ` Paolo Bonzini
2015-09-10 11:02               ` Dennis Luehring
2015-09-10 11:20                 ` Artyom Tarasenko
2015-09-10 13:54   ` Peter Maydell
2015-09-10 17:48 ` Aurelien Jarno
2015-09-13 21:00   ` Aurelien Jarno
2015-09-10 18:55 ` Alex Bennée
2015-09-15 20:19   ` Richard Henderson
2015-09-16  6:19     ` Dennis Luehring
2015-09-16  8:59     ` Alex Bennée
2015-09-16 20:41       ` Richard Henderson

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