From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34218) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXIE0-00012l-Do for qemu-devel@nongnu.org; Wed, 02 Sep 2015 20:17:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZXIDz-0006JZ-LW for qemu-devel@nongnu.org; Wed, 02 Sep 2015 20:17:56 -0400 Received: from mail-pa0-x232.google.com ([2607:f8b0:400e:c03::232]:34237) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXIDz-0006J8-BM for qemu-devel@nongnu.org; Wed, 02 Sep 2015 20:17:55 -0400 Received: by padhy1 with SMTP id hy1so27105035pad.1 for ; Wed, 02 Sep 2015 17:17:54 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Wed, 2 Sep 2015 17:17:35 -0700 Message-Id: <1441239463-18981-10-git-send-email-rth@twiddle.net> In-Reply-To: <1441239463-18981-1-git-send-email-rth@twiddle.net> References: <1441239463-18981-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 09/17] target-openrisc: Implement ff1 and fl1 for 64-bit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, proljc@gmail.com True, this is unused so far, but commented out is worse than actually implemented properly. Signed-off-by: Richard Henderson --- target-openrisc/int_helper.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/target-openrisc/int_helper.c b/target-openrisc/int_helper.c index f75e1b3..6e12fab 100644 --- a/target-openrisc/int_helper.c +++ b/target-openrisc/int_helper.c @@ -25,19 +25,20 @@ target_ulong HELPER(ff1)(target_ulong x) { -/*#ifdef TARGET_OPENRISC64 - return x ? ctz64(x) + 1 : 0; -#else*/ - return x ? ctz32(x) + 1 : 0; -/*#endif*/ + if (x == 0) { + return 0; + } else if (TARGET_LONG_BITS == 64) { + return ctz64(x) + 1; + } else { + return ctz32(x) + 1; + } } target_ulong HELPER(fl1)(target_ulong x) { -/* not used yet, open it when we need or64. */ -/*#ifdef TARGET_OPENRISC64 - return 64 - clz64(x); -#else*/ - return 32 - clz32(x); -/*#endif*/ + if (TARGET_LONG_BITS == 64) { + return 64 - clz64(x); + } else { + return 32 - clz32(x); + } } -- 2.4.3