From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH v15 06/33] target-tilegx: Modify _SPECIAL_ opcodes
Date: Wed, 2 Sep 2015 18:30:58 -0700 [thread overview]
Message-ID: <1441243885-7495-7-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1441243885-7495-1-git-send-email-rth@twiddle.net>
Both ADDX_SPECIAL_0_OPCODE_Y1 and ADD_SPECIAL_0_OPCODE_Y1
do not appear to be "special" in any way, except that they
don't follow the normal naming convention using _RRR_.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
target-tilegx/opcode_tilegx.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-tilegx/opcode_tilegx.h b/target-tilegx/opcode_tilegx.h
index 33b71a9..3b8bf4f 100644
--- a/target-tilegx/opcode_tilegx.h
+++ b/target-tilegx/opcode_tilegx.h
@@ -830,11 +830,11 @@ enum
ADDX_RRR_0_OPCODE_X0 = 2,
ADDX_RRR_0_OPCODE_X1 = 2,
ADDX_RRR_0_OPCODE_Y0 = 0,
- ADDX_SPECIAL_0_OPCODE_Y1 = 0,
+ ADDX_RRR_0_OPCODE_Y1 = 0,
ADD_RRR_0_OPCODE_X0 = 3,
ADD_RRR_0_OPCODE_X1 = 3,
ADD_RRR_0_OPCODE_Y0 = 1,
- ADD_SPECIAL_0_OPCODE_Y1 = 1,
+ ADD_RRR_0_OPCODE_Y1 = 1,
ANDI_IMM8_OPCODE_X0 = 3,
ANDI_IMM8_OPCODE_X1 = 3,
ANDI_OPCODE_Y0 = 2,
--
2.4.3
next prev parent reply other threads:[~2015-09-03 1:31 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-03 1:30 [Qemu-devel] [PATCH v15 00/33] TileGX basic instructions Richard Henderson
2015-09-03 1:30 ` [Qemu-devel] [PATCH v15 01/33] linux-user: tilegx: Firstly add architecture related features Richard Henderson
2015-09-03 14:53 ` Eric Blake
[not found] ` <55E96A16.5060206@hotmail.com>
2015-09-04 9:52 ` Chen Gang
2015-09-03 1:30 ` [Qemu-devel] [PATCH v15 02/33] linux-user: Support tilegx architecture in linux-user Richard Henderson
2015-09-03 1:30 ` [Qemu-devel] [PATCH v15 03/33] linux-user: Conditionalize syscalls which are not defined in tilegx Richard Henderson
2015-09-03 1:30 ` [Qemu-devel] [PATCH v15 04/33] target-tilegx: Add opcode basic implementation from Tilera Corporation Richard Henderson
2015-09-03 1:30 ` [Qemu-devel] [PATCH v15 05/33] target-tilegx: Modify opcode_tilegx.h to fit QEMU usage Richard Henderson
2015-09-03 1:30 ` Richard Henderson [this message]
2015-09-03 1:30 ` [Qemu-devel] [PATCH v15 07/33] target-tilegx: Fix LDNA_ADD_IMM8_OPCODE_X1 Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 08/33] target-tilegx: Add special register information from Tilera Corporation Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 09/33] target-tilegx: Add cpu basic features for linux-user Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 10/33] target-tilegx: Add several helpers for instructions translation Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 11/33] target-tilegx: Framework for decoding bundles Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 12/33] target-tilegx: Generate SEGV properly Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 13/33] target-tilegx: Add TILE-Gx building files Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 14/33] target-tilegx: Handle simple logical operations Richard Henderson
2015-09-04 16:48 ` Peter Maydell
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 15/33] target-tilegx: Handle arithmetic instructions Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 16/33] target-tilegx: Handle most bit manipulation instructions Richard Henderson
2015-09-04 16:51 ` Peter Maydell
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 17/33] target-tilegx: Handle basic load and store instructions Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 18/33] target-tilegx: Handle post-increment " Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 19/33] target-tilegx: Handle unconditional jump instructions Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 20/33] target-tilegx: Handle conditional branch instructions Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 21/33] target-tilegx: Handle comparison instructions Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 22/33] target-tilegx: Implement system and memory management instructions Richard Henderson
2015-09-04 16:54 ` Peter Maydell
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 23/33] target-tilegx: Handle bitfield instructions Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 24/33] target-tilegx: Handle shift instructions Richard Henderson
2015-09-04 16:56 ` Peter Maydell
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 25/33] target-tilegx: Handle conditional move instructions Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 26/33] target-tilegx: Handle scalar multiply instructions Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 27/33] target-tilegx: Handle mask instructions Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 28/33] target-tilegx: Handle v1cmpeq, v1cmpne Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 29/33] target-tilegx: Handle mtspr, mfspr Richard Henderson
2015-09-04 16:58 ` Peter Maydell
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 30/33] target-tilegx: Handle atomic instructions Richard Henderson
2015-09-04 17:03 ` Peter Maydell
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 31/33] target-tilegx: Handle v4int_l/h Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 32/33] target-tilegx: Handle v1shli, v1shrui Richard Henderson
2015-09-03 1:31 ` [Qemu-devel] [PATCH v15 33/33] target-tilegx: Handle v1shl, v1shru, v1shrs Richard Henderson
2015-09-03 15:02 ` Eric Blake
2015-09-03 15:38 ` Richard Henderson
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