From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42669) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXauF-0000ht-87 for qemu-devel@nongnu.org; Thu, 03 Sep 2015 16:14:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZXauE-0006rF-95 for qemu-devel@nongnu.org; Thu, 03 Sep 2015 16:14:47 -0400 Received: from mail-pa0-x232.google.com ([2607:f8b0:400e:c03::232]:34002) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXauE-0006r3-3C for qemu-devel@nongnu.org; Thu, 03 Sep 2015 16:14:46 -0400 Received: by padfa1 with SMTP id fa1so607503pad.1 for ; Thu, 03 Sep 2015 13:14:45 -0700 (PDT) From: "Edgar E. Iglesias" Date: Thu, 3 Sep 2015 22:14:18 +0200 Message-Id: <1441311266-8644-3-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1441311266-8644-1-git-send-email-edgar.iglesias@gmail.com> References: <1441311266-8644-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v1 02/10] target-arm: Correct opc1 for AT_S12Exx List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 7df1f06..4234e7c 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2975,16 +2975,16 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 3, .access = PL1_W, .type = ARM_CP_NO_RAW, .writefn = ats_write64 }, { .name = "AT_S12E1R", .state = ARM_CP_STATE_AA64, - .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 4, + .opc0 = 1, .opc1 = 4, .crn = 7, .crm = 8, .opc2 = 4, .access = PL2_W, .type = ARM_CP_NO_RAW, .writefn = ats_write64 }, { .name = "AT_S12E1W", .state = ARM_CP_STATE_AA64, - .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 5, + .opc0 = 1, .opc1 = 4, .crn = 7, .crm = 8, .opc2 = 5, .access = PL2_W, .type = ARM_CP_NO_RAW, .writefn = ats_write64 }, { .name = "AT_S12E0R", .state = ARM_CP_STATE_AA64, - .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 6, + .opc0 = 1, .opc1 = 4, .crn = 7, .crm = 8, .opc2 = 6, .access = PL2_W, .type = ARM_CP_NO_RAW, .writefn = ats_write64 }, { .name = "AT_S12E0W", .state = ARM_CP_STATE_AA64, - .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 7, + .opc0 = 1, .opc1 = 4, .crn = 7, .crm = 8, .opc2 = 7, .access = PL2_W, .type = ARM_CP_NO_RAW, .writefn = ats_write64 }, /* AT S1E2* are elsewhere as they UNDEF from EL3 if EL2 is not present */ { .name = "AT_S1E3R", .state = ARM_CP_STATE_AA64, -- 1.9.1