From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org, peter.maydell@linaro.org
Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com,
alex.bennee@linaro.org, agraf@suse.de
Subject: [Qemu-devel] [PATCH v1 08/10] target-arm: Supress EPD for S2, EL2 and EL3 translations
Date: Thu, 3 Sep 2015 22:14:24 +0200 [thread overview]
Message-ID: <1441311266-8644-9-git-send-email-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <1441311266-8644-1-git-send-email-edgar.iglesias@gmail.com>
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Stage-2 translations, EL2 and EL3 regimes don't have the
EPD control.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
target-arm/helper.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 66b3fed..a53d713 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -6323,7 +6323,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
/* Read an LPAE long-descriptor translation table. */
MMUFaultType fault_type = translation_fault;
uint32_t level = 1;
- uint32_t epd;
+ uint32_t epd = 0;
int32_t tsz;
uint32_t tg;
uint64_t ttbr;
@@ -6420,7 +6420,9 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
*/
if (ttbr_select == 0) {
ttbr = regime_ttbr(env, mmu_idx, 0);
- epd = extract32(tcr->raw_tcr, 7, 1);
+ if (el < 2 && mmu_idx != ARMMMUIdx_S2NS) {
+ epd = extract32(tcr->raw_tcr, 7, 1);
+ }
tsz = t0sz;
tg = extract32(tcr->raw_tcr, 14, 2);
--
1.9.1
next prev parent reply other threads:[~2015-09-03 20:15 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-03 20:14 [Qemu-devel] [PATCH v1 00/10] arm: Steps towards EL2 support round 4 Edgar E. Iglesias
2015-09-03 20:14 ` [Qemu-devel] [PATCH v1 01/10] target-arm: Log the target EL when taking exceptions Edgar E. Iglesias
2015-09-03 22:18 ` Alistair Francis
2015-09-03 20:14 ` [Qemu-devel] [PATCH v1 02/10] target-arm: Correct opc1 for AT_S12Exx Edgar E. Iglesias
2015-09-03 22:45 ` Alistair Francis
2015-09-03 20:14 ` [Qemu-devel] [PATCH v1 03/10] target-arm: Add AArch64 access to PAR_EL1 Edgar E. Iglesias
2015-09-03 23:33 ` Alistair Francis
2015-09-03 20:14 ` [Qemu-devel] [PATCH v1 04/10] target-arm: Add VTCR_EL2 Edgar E. Iglesias
2015-09-08 14:19 ` Peter Maydell
2015-09-08 14:36 ` Edgar E. Iglesias
2015-09-11 14:40 ` Edgar E. Iglesias
2015-09-11 14:43 ` Peter Maydell
2015-09-11 16:11 ` Edgar E. Iglesias
2015-09-03 20:14 ` [Qemu-devel] [PATCH v1 05/10] target-arm: Add VTTBR_EL2 Edgar E. Iglesias
2015-09-08 14:27 ` Peter Maydell
2015-09-08 18:14 ` Edgar E. Iglesias
2015-09-03 20:14 ` [Qemu-devel] [PATCH v1 06/10] target-arm: Supress TBI for S2 translations Edgar E. Iglesias
2015-09-08 14:30 ` Peter Maydell
2015-09-03 20:14 ` [Qemu-devel] [PATCH v1 07/10] target-arm: Supress the use of TTBR1 " Edgar E. Iglesias
2015-09-08 14:32 ` Peter Maydell
2015-09-08 14:42 ` Edgar E. Iglesias
2015-09-08 14:50 ` Peter Maydell
2015-09-08 14:57 ` Edgar E. Iglesias
2015-09-03 20:14 ` Edgar E. Iglesias [this message]
2015-09-08 14:33 ` [Qemu-devel] [PATCH v1 08/10] target-arm: Supress EPD for S2, EL2 and EL3 translations Peter Maydell
2015-09-03 20:14 ` [Qemu-devel] [PATCH v1 09/10] target-arm: Add VPIDR_EL2 Edgar E. Iglesias
2015-09-08 14:36 ` Peter Maydell
2015-09-03 20:14 ` [Qemu-devel] [PATCH v1 10/10] target-arm: Add VMPIDR_EL2 Edgar E. Iglesias
2015-09-08 14:42 ` Peter Maydell
2015-09-08 14:43 ` [Qemu-devel] [PATCH v1 00/10] arm: Steps towards EL2 support round 4 Peter Maydell
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