From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42924) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXauz-0001w8-IF for qemu-devel@nongnu.org; Thu, 03 Sep 2015 16:15:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZXaux-0007UH-Ks for qemu-devel@nongnu.org; Thu, 03 Sep 2015 16:15:32 -0400 Received: from mail-pa0-x236.google.com ([2607:f8b0:400e:c03::236]:34069) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXaux-0007Tv-F7 for qemu-devel@nongnu.org; Thu, 03 Sep 2015 16:15:31 -0400 Received: by padfa1 with SMTP id fa1so623475pad.1 for ; Thu, 03 Sep 2015 13:15:30 -0700 (PDT) From: "Edgar E. Iglesias" Date: Thu, 3 Sep 2015 22:14:24 +0200 Message-Id: <1441311266-8644-9-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1441311266-8644-1-git-send-email-edgar.iglesias@gmail.com> References: <1441311266-8644-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v1 08/10] target-arm: Supress EPD for S2, EL2 and EL3 translations List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de From: "Edgar E. Iglesias" Stage-2 translations, EL2 and EL3 regimes don't have the EPD control. Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 66b3fed..a53d713 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -6323,7 +6323,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, /* Read an LPAE long-descriptor translation table. */ MMUFaultType fault_type = translation_fault; uint32_t level = 1; - uint32_t epd; + uint32_t epd = 0; int32_t tsz; uint32_t tg; uint64_t ttbr; @@ -6420,7 +6420,9 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, */ if (ttbr_select == 0) { ttbr = regime_ttbr(env, mmu_idx, 0); - epd = extract32(tcr->raw_tcr, 7, 1); + if (el < 2 && mmu_idx != ARMMMUIdx_S2NS) { + epd = extract32(tcr->raw_tcr, 7, 1); + } tsz = t0sz; tg = extract32(tcr->raw_tcr, 14, 2); -- 1.9.1