From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38020) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXsZ9-0008TB-O0 for qemu-devel@nongnu.org; Fri, 04 Sep 2015 11:06:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZXsZ5-0000os-Pp for qemu-devel@nongnu.org; Fri, 04 Sep 2015 11:06:11 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:35023) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXsZ5-0000iE-Jm for qemu-devel@nongnu.org; Fri, 04 Sep 2015 11:06:07 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1ZXsYu-0006Fg-RK for qemu-devel@nongnu.org; Fri, 04 Sep 2015 16:05:56 +0100 From: Peter Maydell Date: Fri, 4 Sep 2015 16:05:46 +0100 Message-Id: <1441379156-23939-18-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1441379156-23939-1-git-send-email-peter.maydell@linaro.org> References: <1441379156-23939-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 17/27] target-arm: Fix arm_excp_unmasked() function List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: Sergey Sorokin There is an error in arm_excp_unmasked() function: bitwise operator & is used with integer and bool operands causing an incorrect zeroed result. The patch fixes it. Signed-off-by: Sergey Sorokin Message-id: 1441209238-16881-1-git-send-email-afarallax@yandex.ru Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target-arm/cpu.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index c794afc..4bd5dc8 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1520,8 +1520,8 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, CPUARMState *env = cs->env_ptr; unsigned int cur_el = arm_current_el(env); bool secure = arm_is_secure(env); - uint32_t scr; - uint32_t hcr; + bool scr; + bool hcr; bool pstate_unmasked; int8_t unmasked = 0; @@ -1548,7 +1548,7 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, * set then FIQs can be masked by CPSR.F when non-secure but only * when FIQs are only routed to EL3. */ - scr &= !((env->cp15.scr_el3 & SCR_FW) && !hcr); + scr = scr && !((env->cp15.scr_el3 & SCR_FW) && !hcr); pstate_unmasked = !(env->daif & PSTATE_F); break; -- 1.9.1