From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38162) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXsZE-0000B8-Gg for qemu-devel@nongnu.org; Fri, 04 Sep 2015 11:06:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZXsZ8-0000qi-KO for qemu-devel@nongnu.org; Fri, 04 Sep 2015 11:06:16 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:35023) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXsZ8-0000iE-CI for qemu-devel@nongnu.org; Fri, 04 Sep 2015 11:06:10 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1ZXsYv-0006GW-AD for qemu-devel@nongnu.org; Fri, 04 Sep 2015 16:05:57 +0100 From: Peter Maydell Date: Fri, 4 Sep 2015 16:05:56 +0100 Message-Id: <1441379156-23939-28-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1441379156-23939-1-git-send-email-peter.maydell@linaro.org> References: <1441379156-23939-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 27/27] arm/virt: Add full-sized CPU affinity handling List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: Pavel Fedin At least with KVM, currently there's no reason why QEMU would not be capable of handling Aff3 != 0. This commit fixes up FDT creation in such a case. Signed-off-by: Pavel Fedin Message-id: eef5a86e6d9a313780dbc23b35fcb65df42a3e9e.1441366248.git.p.fedin@samsung.com [PMM: folded two overlong lines] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/virt.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 60736c2..91e45e0 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -288,9 +288,32 @@ static void fdt_add_timer_nodes(const VirtBoardInfo *vbi) static void fdt_add_cpu_nodes(const VirtBoardInfo *vbi) { int cpu; + int addr_cells = 1; + + /* + * From Documentation/devicetree/bindings/arm/cpus.txt + * On ARM v8 64-bit systems value should be set to 2, + * that corresponds to the MPIDR_EL1 register size. + * If MPIDR_EL1[63:32] value is equal to 0 on all CPUs + * in the system, #address-cells can be set to 1, since + * MPIDR_EL1[63:32] bits are not used for CPUs + * identification. + * + * Here we actually don't know whether our system is 32- or 64-bit one. + * The simplest way to go is to examine affinity IDs of all our CPUs. If + * at least one of them has Aff3 populated, we set #address-cells to 2. + */ + for (cpu = 0; cpu < vbi->smp_cpus; cpu++) { + ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(cpu)); + + if (armcpu->mp_affinity & ARM_AFF3_MASK) { + addr_cells = 2; + break; + } + } qemu_fdt_add_subnode(vbi->fdt, "/cpus"); - qemu_fdt_setprop_cell(vbi->fdt, "/cpus", "#address-cells", 0x1); + qemu_fdt_setprop_cell(vbi->fdt, "/cpus", "#address-cells", addr_cells); qemu_fdt_setprop_cell(vbi->fdt, "/cpus", "#size-cells", 0x0); for (cpu = vbi->smp_cpus - 1; cpu >= 0; cpu--) { @@ -307,7 +330,14 @@ static void fdt_add_cpu_nodes(const VirtBoardInfo *vbi) "enable-method", "psci"); } - qemu_fdt_setprop_cell(vbi->fdt, nodename, "reg", armcpu->mp_affinity); + if (addr_cells == 2) { + qemu_fdt_setprop_u64(vbi->fdt, nodename, "reg", + armcpu->mp_affinity); + } else { + qemu_fdt_setprop_cell(vbi->fdt, nodename, "reg", + armcpu->mp_affinity); + } + g_free(nodename); } } -- 1.9.1