[Qemu-devel] [PATCH RFC 0/3] arm64: cross cpu support

[Qemu-devel] [PATCH RFC 0/3] arm64: cross cpu support

[Tushar Jagad]

Currently, it is not possible to run guests in a cross cpu configuration
(for example: running of cortex-a57 guests on X-Gene or vice versa) on
arm platforms. 

This patchset adds support of passing implementation specific hardware
capabilites to vcpu for arm platforms for running guest in cross cpu
configuration. As of now passing of number of hardware breakpoints and
number of hardware watchpoints is supported. This is done by adding
properties to -cpu parameter on the command line.

Example:
cortex-a57 guest with 2 hardware breakpoints and 2 hardware watchpoints can
be started on X-Gene host using

qemu-system-aarch64 -M virt -cpu cortex-a57,bpts=2,wpts=2 \
    -smp cpus=1 -m 1024 -enable-kvm -nographic \
    -drive file=ubuntu-core-14.04.1-core-arm64.img,if=none,id=drive0,format=raw,media=disk  \
    -kernel Image -append "console=ttyAMA0 root=/dev/vda rootwait rw"

Please note that the supporting patches for KVM have not been merged
into the mainline tree yet.

These patches are on top of qemu tag v2.4.0.

Tushar Jagad (3):
  linux-headers: sync'd kernel headers for arm/arm64
  arm: cross cpu: add new properties for arm cpu
  arm64: pass breakpoint/watchpoint info for target cpu

 hw/arm/virt.c                 | 23 ++++++++++++++++++++++-
 linux-headers/asm-arm64/kvm.h |  9 +++++++++
 target-arm/cpu-qom.h          |  6 ++++++
 target-arm/cpu.c              |  2 ++
 target-arm/kvm64.c            |  8 ++++++++
 5 files changed, 47 insertions(+), 1 deletion(-)

-- 
2.4.3

[Qemu-devel] [PATCH RFC 1/3] linux-headers: sync'd kernel headers for arm/arm64

[Tushar Jagad]

Sync arm/arm64 headers for bringing in support for cross cpu.

Signed-off-by: Tushar Jagad <tushar.jagad@linaro.org>
---
 linux-headers/asm-arm64/kvm.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h
index c8abf25..94d1fc9 100644
--- a/linux-headers/asm-arm64/kvm.h
+++ b/linux-headers/asm-arm64/kvm.h
@@ -88,6 +88,13 @@ struct kvm_regs {
 #define KVM_ARM_VCPU_POWER_OFF		0 /* CPU is started in OFF state */
 #define KVM_ARM_VCPU_EL1_32BIT		1 /* CPU running a 32bit VM */
 #define KVM_ARM_VCPU_PSCI_0_2		2 /* CPU uses PSCI v0.2 */
+#define KVM_ARM_VCPU_NUM_BPTS		3 /* Number of breakpoints supported */
+#define KVM_ARM_VCPU_NUM_WPTS		7 /* Number of watchpoints supported */
+
+#define KVM_ARM_VCPU_BPTS_FEATURES_IDX	0
+#define KVM_ARM_VCPU_WPTS_FEATURES_IDX	0
+#define KVM_ARM_VCPU_BPTS_MASK		0x00000078
+#define KVM_ARM_VCPU_WPTS_MASK		0x00000780
 
 struct kvm_vcpu_init {
 	__u32 target;
@@ -193,7 +200,9 @@ struct kvm_arch_memory_slot {
  * and only here to provide source code level compatibility with older
  * userland. The highest SPI number can be set via KVM_DEV_ARM_VGIC_GRP_NR_IRQS.
  */
+#ifndef __KERNEL__
 #define KVM_ARM_IRQ_GIC_MAX		127
+#endif
 
 /* One single KVM irqchip, ie. the VGIC */
 #define KVM_NR_IRQCHIPS          1
-- 
2.4.3

[Qemu-devel] [PATCH RFC 2/3] arm: cross cpu: add new properties for arm cpu

[Tushar Jagad]

In order to support cross cpu for arm certain properties should be defined
by the datacenter admin. This is necessary for migrating guests to different
hardware platforms. CPU properties like number of breakpoints, watchpoints
and pmu counters are implementation specific. We need to restrict the guest
kernel to a specific count considering different mix of hardware platforms
in the datacenter.

This patch adds new properties for defining hardware in terms of number of
breakpoints, watchpoints and pmu counters supported in the guest.

Signed-off-by: Tushar Jagad <tushar.jagad@linaro.org>
---
 target-arm/cpu.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 8b4323d..a07613e 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -1349,6 +1349,8 @@ static Property arm_cpu_properties[] = {
     DEFINE_PROP_BOOL("start-powered-off", ARMCPU, start_powered_off, false),
     DEFINE_PROP_UINT32("psci-conduit", ARMCPU, psci_conduit, 0),
     DEFINE_PROP_UINT32("midr", ARMCPU, midr, 0),
+    DEFINE_PROP_UINT32("bpts", ARMCPU, bpts, 0),
+    DEFINE_PROP_UINT32("wpts", ARMCPU, wpts, 0),
     DEFINE_PROP_END_OF_LIST()
 };
 
-- 
2.4.3

[Qemu-devel] [PATCH RFC 3/3] arm64: pass breakpoint/watchpoint info for target cpu

[Tushar Jagad]

This patch adds support for passing user defined hardware properties to the
host kernel for cross cpu environment.

ARM cpu has a lot of implementation specific hardware features which
differ from vendor to vendor. This pose a hurdle to run guests in a cross
cpu type environment (for example: running cortex-a57 guests on x-gene and
vice-versa).

The implementation specific hardware properties like number of hardware
breakpoints, watchpoints, etc needs to be defined for guest for the Cross CPU
execution. This is specifically useful in an environment where a mix of
hardware platforms are available and the guest cpu needs to be different
from the host cpu.

Qemu passes this information to the host kernel which reflects these
properties accordingly in the guest vcpu.

Signed-off-by: Tushar Jagad <tushar.jagad@linaro.org>
---
 hw/arm/virt.c        | 23 ++++++++++++++++++++++-
 target-arm/cpu-qom.h |  6 ++++++
 target-arm/kvm64.c   |  8 ++++++++
 3 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 4846892..23ca35f 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -828,6 +828,8 @@ static void machvirt_init(MachineState *machine)
         ObjectClass *oc = cpu_class_by_name(TYPE_ARM_CPU, cpustr[0]);
         CPUClass *cc = CPU_CLASS(oc);
         Object *cpuobj;
+        CPUState *cs;
+        ARMCPU *cpu;
         Error *err = NULL;
         char *cpuopts = g_strdup(cpustr[1]);
 
@@ -837,8 +839,11 @@ static void machvirt_init(MachineState *machine)
         }
         cpuobj = object_new(object_class_get_name(oc));
 
+        cs = CPU(cpuobj);
+        cpu = ARM_CPU(cs);
+
         /* Handle any CPU options specified by the user */
-        cc->parse_features(CPU(cpuobj), cpuopts, &err);
+        cc->parse_features(cs, cpuopts, &err);
         g_free(cpuopts);
         if (err) {
             error_report_err(err);
@@ -863,6 +868,22 @@ static void machvirt_init(MachineState *machine)
         }
 
         object_property_set_bool(cpuobj, true, "realized", NULL);
+
+        if (object_property_find(cpuobj, "bpts", NULL)) {
+            cpu->bpts = object_property_get_int(cpuobj, "bpts", &error_abort);
+            if (cpu->bpts && cpu->bpts < 2) {
+                printf("Minimum number of breakpoints > 2\n");
+                exit(1);
+            }
+        }
+
+        if (object_property_find(cpuobj, "wpts", NULL)) {
+            cpu->wpts = object_property_get_int(cpuobj, "wpts", &error_abort);
+            if (cpu->wpts && cpu->wpts < 2) {
+                printf("Minimum number of watchpoints > 2\n");
+                exit(1);
+            }
+        }
     }
     g_strfreev(cpustr);
     fdt_add_timer_nodes(vbi);
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 3cbc4a0..aceaaab 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -121,6 +121,12 @@ typedef struct ARMCPU {
     /* KVM init features for this CPU */
     uint32_t kvm_init_features[7];
 
+    /* Number of h/w breakpoints supported by the guest */
+    uint32_t bpts;
+
+    /* Number of h/w watchpoints supported by the guest */
+    uint32_t wpts;
+
     /* Uniprocessor system with MP extensions */
     bool mp_is_up;
 
diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
index bd60889..39ff54b 100644
--- a/target-arm/kvm64.c
+++ b/target-arm/kvm64.c
@@ -105,6 +105,14 @@ int kvm_arch_init_vcpu(CPUState *cs)
         cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_EL1_32BIT;
     }
 
+    if (cpu->bpts)
+        cpu->kvm_init_features[KVM_ARM_VCPU_BPTS_FEATURES_IDX] |=
+            (cpu->bpts << KVM_ARM_VCPU_NUM_BPTS) & KVM_ARM_VCPU_BPTS_MASK;
+
+    if (cpu->wpts)
+        cpu->kvm_init_features[KVM_ARM_VCPU_WPTS_FEATURES_IDX] |=
+            (cpu->wpts << KVM_ARM_VCPU_NUM_WPTS) & KVM_ARM_VCPU_WPTS_MASK;
+
     /* Do KVM_ARM_VCPU_INIT ioctl */
     ret = kvm_arm_vcpu_init(cs);
     if (ret) {
-- 
2.4.3