From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52934) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZZflj-0005iX-A1 for qemu-devel@nongnu.org; Wed, 09 Sep 2015 09:50:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZZfli-00030p-CW for qemu-devel@nongnu.org; Wed, 09 Sep 2015 09:50:35 -0400 Received: from mx1.redhat.com ([209.132.183.28]:57961) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZZflh-00030U-Jr for qemu-devel@nongnu.org; Wed, 09 Sep 2015 09:50:33 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (Postfix) with ESMTPS id 4C9998C1C3 for ; Wed, 9 Sep 2015 13:50:33 +0000 (UTC) Received: from donizetti.redhat.com (ovpn-112-83.ams2.redhat.com [10.36.112.83]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t89DoEht030571 for ; Wed, 9 Sep 2015 09:50:32 -0400 From: Paolo Bonzini Date: Wed, 9 Sep 2015 15:49:40 +0200 Message-Id: <1441806613-13775-11-git-send-email-pbonzini@redhat.com> In-Reply-To: <1441806613-13775-1-git-send-email-pbonzini@redhat.com> References: <1441806613-13775-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PULL 10/43] tcg: introduce tcg_current_cpu List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This is already useful on Windows in order to remove tls.h, because accesses to current_cpu are done from a different thread on that platform. It will be used on POSIX platforms as soon TCG stops using signals to interrupt the execution of translated code. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- cpu-exec.c | 14 +++++--------- cpus.c | 5 +++-- include/exec/exec-all.h | 1 + 3 files changed, 9 insertions(+), 11 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index 713540f..5153f1b 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -342,6 +342,7 @@ static void cpu_handle_debug_exception(CPUState *cpu) /* main execution loop */ volatile sig_atomic_t exit_request; +CPUState *tcg_current_cpu; int cpu_exec(CPUState *cpu) { @@ -368,15 +369,7 @@ int cpu_exec(CPUState *cpu) } current_cpu = cpu; - - /* As long as current_cpu is null, up to the assignment just above, - * requests by other threads to exit the execution loop are expected to - * be issued using the exit_request global. We must make sure that our - * evaluation of the global value is performed past the current_cpu - * value transition point, which requires a memory barrier as well as - * an instruction scheduling constraint on modern architectures. */ - smp_mb(); - + atomic_mb_set(&tcg_current_cpu, cpu); rcu_read_lock(); if (unlikely(exit_request)) { @@ -579,5 +572,8 @@ int cpu_exec(CPUState *cpu) /* fail safe : never use current_cpu outside cpu_exec() */ current_cpu = NULL; + + /* Does not need atomic_mb_set because a spurious wakeup is okay. */ + atomic_set(&tcg_current_cpu, NULL); return ret; } diff --git a/cpus.c b/cpus.c index e831aa3..6cebb7a 100644 --- a/cpus.c +++ b/cpus.c @@ -663,8 +663,9 @@ static void cpu_handle_guest_debug(CPUState *cpu) static void cpu_signal(int sig) { - if (current_cpu) { - cpu_exit(current_cpu); + CPUState *cpu = atomic_mb_read(&tcg_current_cpu); + if (cpu) { + cpu_exit(cpu); } exit_request = 1; } diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 83b9251..d5dd48f 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -387,6 +387,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr); extern int singlestep; /* cpu-exec.c */ +extern CPUState *tcg_current_cpu; extern volatile sig_atomic_t exit_request; #if !defined(CONFIG_USER_ONLY) -- 2.4.3