From: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
To: qemu-devel@nongnu.org, stefanha@gmail.com,
crosthwaitepeter@gmail.com, peter.maydell@linaro.org
Cc: alistai@xilinx.com, edgari@xilinx.com,
Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Subject: [Qemu-devel] [PATCH V1] sdhci: Fix hostctl2 write logic.
Date: Fri, 11 Sep 2015 16:00:33 +0530 [thread overview]
Message-ID: <1441967433-19456-1-git-send-email-saipava@xilinx.com> (raw)
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
This should be a shifted MASKED_WRITE like all other instances of
non-word aligned registers.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---
hw/sd/sdhci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 8fd75f7..fd354e3 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1059,7 +1059,7 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
value |= SDHC_CTRL2_SAMPLING_CLKSEL;
}
s->acmd12errsts = value;
- s->hostctl2 = value >> 16;
+ MASKED_WRITE(s->hostctl2, mask >> 16, value >> 16);
break;
case SDHC_CLKCON:
if (!(mask & 0xFF000000)) {
--
2.1.1
next reply other threads:[~2015-09-11 10:31 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-11 10:30 Sai Pavan Boddu [this message]
2015-09-13 20:36 ` [Qemu-devel] [PATCH V1] sdhci: Fix hostctl2 write logic Peter Crosthwaite
2015-09-15 22:59 ` Alistair Francis
2015-10-08 15:51 ` Peter Crosthwaite
-- strict thread matches above, loose matches on Subject: below --
2015-10-10 3:40 Sai Pavan Boddu
2015-10-31 15:06 Sai Pavan Boddu
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