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From: Sergey Fedorov <serge.fdrv@gmail.com>
To: qemu-devel@nongnu.org
Cc: Sergey Fedorov <serge.fdrv@gmail.com>,
	Peter Maydell <peter.maydell@linaro.org>
Subject: [Qemu-devel] [PATCH] target-arm: fix CPU breakpoint handling
Date: Mon, 14 Sep 2015 13:51:28 +0300	[thread overview]
Message-ID: <1442227888-11467-1-git-send-email-serge.fdrv@gmail.com> (raw)

A QEMU breakpoint match is not definitely an architectural breakpoint
match. If an exception is generated unconditionally during translation,
it is hardly possible to ignore it in the debug exceptoin hanlder.

Generate a call to helper to check CPU breakpoints and raise an
exception only if any breakpoint architecturally matches.

Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com>
---
 target-arm/helper.h        |  2 ++
 target-arm/op_helper.c     | 20 +++++++++++++++++++-
 target-arm/translate-a64.c | 12 +++++++-----
 target-arm/translate.c     | 12 +++++++-----
 4 files changed, 35 insertions(+), 11 deletions(-)

diff --git a/target-arm/helper.h b/target-arm/helper.h
index 827b33d..c2a85c7 100644
--- a/target-arm/helper.h
+++ b/target-arm/helper.h
@@ -54,6 +54,8 @@ DEF_HELPER_1(yield, void, env)
 DEF_HELPER_1(pre_hvc, void, env)
 DEF_HELPER_2(pre_smc, void, env, i32)
 
+DEF_HELPER_1(check_breakpoints, void, env)
+
 DEF_HELPER_3(cpsr_write, void, env, i32, i32)
 DEF_HELPER_1(cpsr_read, i32, env)
 
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index b298e57..24dcefd 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -877,6 +877,15 @@ bool arm_debug_check_watchpoint(CPUState *cs)
     return check_watchpoints(cpu);
 }
 
+void HELPER(check_breakpoints)(CPUARMState *env)
+{
+    ARMCPU *cpu = arm_env_get_cpu(env);
+
+    if (check_breakpoints(cpu)) {
+        HELPER(exception_internal(env, EXCP_DEBUG));
+    }
+}
+
 void arm_debug_excp_handler(CPUState *cs)
 {
     /* Called by core code when a watchpoint or breakpoint fires;
@@ -904,7 +913,16 @@ void arm_debug_excp_handler(CPUState *cs)
                     arm_debug_target_el(env));
         }
     } else {
-        if (check_breakpoints(cpu)) {
+        CPUBreakpoint *bp;
+        uint64_t pc = is_a64(env) ? env->pc : env->regs[15];
+
+        QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
+            if (bp->pc == pc && !(bp->flags & BP_CPU)) {
+                return;
+            }
+        }
+
+        {
             bool same_el = (arm_debug_target_el(env) == arm_current_el(env));
             if (extended_addresses_enabled(env)) {
                 env->exception.fsr = (1 << 9) | 0x22;
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 5c13e15..a5927fd 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -11000,11 +11000,13 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
         if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
             QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
                 if (bp->pc == dc->pc) {
-                    gen_exception_internal_insn(dc, 0, EXCP_DEBUG);
-                    /* Advance PC so that clearing the breakpoint will
-                       invalidate this TB.  */
-                    dc->pc += 2;
-                    goto done_generating;
+                    if (bp->flags & BP_CPU) {
+                        gen_helper_check_breakpoints(cpu_env);
+                        break;
+                    } else {
+                        gen_exception_internal_insn(dc, 0, EXCP_DEBUG);
+                        goto done_generating;
+                    }
                 }
             }
         }
diff --git a/target-arm/translate.c b/target-arm/translate.c
index e27634f..7e2d214 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -11292,11 +11292,13 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
         if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
             QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
                 if (bp->pc == dc->pc) {
-                    gen_exception_internal_insn(dc, 0, EXCP_DEBUG);
-                    /* Advance PC so that clearing the breakpoint will
-                       invalidate this TB.  */
-                    dc->pc += 2;
-                    goto done_generating;
+                    if (bp->flags & BP_CPU) {
+                        gen_helper_check_breakpoints(cpu_env);
+                        break;
+                    } else {
+                        gen_exception_internal_insn(dc, 0, EXCP_DEBUG);
+                        goto done_generating;
+                    }
                 }
             }
         }
-- 
1.9.1

             reply	other threads:[~2015-09-14 10:52 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-14 10:51 Sergey Fedorov [this message]
2015-09-18 13:50 ` [Qemu-devel] [PATCH] target-arm: fix CPU breakpoint handling Peter Maydell
2015-09-18 14:07   ` Sergey Fedorov
2015-09-18 14:14     ` Peter Maydell
2015-09-18 16:33       ` Sergey Fedorov
2015-09-18 16:36         ` Peter Maydell
2015-09-18 17:14           ` Sergey Fedorov
2015-09-25 11:34     ` Sergey Fedorov
2015-09-25 11:42       ` Sergey Fedorov

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