From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53221) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbROc-0000g6-MG for qemu-devel@nongnu.org; Mon, 14 Sep 2015 06:54:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZbROZ-0002wx-GI for qemu-devel@nongnu.org; Mon, 14 Sep 2015 06:54:02 -0400 Received: from mail-lb0-x22d.google.com ([2a00:1450:4010:c04::22d]:34525) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbROZ-0002wp-61 for qemu-devel@nongnu.org; Mon, 14 Sep 2015 06:53:59 -0400 Received: by lbbmp1 with SMTP id mp1so65153564lbb.1 for ; Mon, 14 Sep 2015 03:53:58 -0700 (PDT) From: Sergey Fedorov Date: Mon, 14 Sep 2015 13:53:48 +0300 Message-Id: <1442228028-11622-1-git-send-email-serge.fdrv@gmail.com> Subject: [Qemu-devel] [PATCH] target-arm: implement arm_debug_target_el() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Sergey Fedorov , Peter Maydell Implement debug exception routing according to ARM ARM D2.3.1 Pseudocode description of routing debug exceptions. Signed-off-by: Sergey Fedorov --- target-arm/cpu.h | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 31825d3..84d38b1 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1692,7 +1692,22 @@ static inline int cpu_mmu_index(CPUARMState *env) */ static inline int arm_debug_target_el(CPUARMState *env) { - return 1; + bool secure = arm_is_secure(env); + bool route_to_el2 = false; + + if (arm_feature(env, ARM_FEATURE_EL2) && !secure) { + route_to_el2 = env->cp15.hcr_el2 & HCR_TGE || + env->cp15.mdcr_el2 & (1 << 8); + } + + if (route_to_el2) { + return 2; + } else if (arm_feature(env, ARM_FEATURE_EL3) && + !arm_el_is_aa64(env, 3) && secure) { + return 3; + } else { + return 1; + } } static inline bool aa64_generate_debug_exceptions(CPUARMState *env) -- 1.9.1