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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH v16 23/35] target-tilegx: Handle comparison instructions
Date: Mon, 14 Sep 2015 15:43:30 -0700	[thread overview]
Message-ID: <1442270622-8955-24-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1442270622-8955-1-git-send-email-rth@twiddle.net>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-tilegx/translate.c | 39 +++++++++++++++++++++++++++++++++------
 1 file changed, 33 insertions(+), 6 deletions(-)

diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 5d7aefa..0fbd11b 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -473,32 +473,52 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext,
     case OE_RRR(CMOVEQZ, 4, Y0):
     case OE_RRR(CMOVNEZ, 0, X0):
     case OE_RRR(CMOVNEZ, 4, Y0):
+        return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
     case OE_RRR(CMPEQ, 0, X0):
     case OE_RRR(CMPEQ, 0, X1):
     case OE_RRR(CMPEQ, 3, Y0):
     case OE_RRR(CMPEQ, 3, Y1):
+        tcg_gen_setcond_tl(TCG_COND_EQ, tdest, tsrca, tsrcb);
+        mnemonic = "cmpeq";
+        break;
     case OE_RRR(CMPEXCH4, 0, X1):
     case OE_RRR(CMPEXCH, 0, X1):
+        return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
     case OE_RRR(CMPLES, 0, X0):
     case OE_RRR(CMPLES, 0, X1):
     case OE_RRR(CMPLES, 2, Y0):
     case OE_RRR(CMPLES, 2, Y1):
+        tcg_gen_setcond_tl(TCG_COND_LE, tdest, tsrca, tsrcb);
+        mnemonic = "cmples";
+        break;
     case OE_RRR(CMPLEU, 0, X0):
     case OE_RRR(CMPLEU, 0, X1):
     case OE_RRR(CMPLEU, 2, Y0):
     case OE_RRR(CMPLEU, 2, Y1):
+        tcg_gen_setcond_tl(TCG_COND_LEU, tdest, tsrca, tsrcb);
+        mnemonic = "cmpleu";
+        break;
     case OE_RRR(CMPLTS, 0, X0):
     case OE_RRR(CMPLTS, 0, X1):
     case OE_RRR(CMPLTS, 2, Y0):
     case OE_RRR(CMPLTS, 2, Y1):
+        tcg_gen_setcond_tl(TCG_COND_LT, tdest, tsrca, tsrcb);
+        mnemonic = "cmplts";
+        break;
     case OE_RRR(CMPLTU, 0, X0):
     case OE_RRR(CMPLTU, 0, X1):
     case OE_RRR(CMPLTU, 2, Y0):
     case OE_RRR(CMPLTU, 2, Y1):
+        tcg_gen_setcond_tl(TCG_COND_LTU, tdest, tsrca, tsrcb);
+        mnemonic = "cmpltu";
+        break;
     case OE_RRR(CMPNE, 0, X0):
     case OE_RRR(CMPNE, 0, X1):
     case OE_RRR(CMPNE, 3, Y0):
     case OE_RRR(CMPNE, 3, Y1):
+        tcg_gen_setcond_tl(TCG_COND_NE, tdest, tsrca, tsrcb);
+        mnemonic = "cmpne";
+        break;
     case OE_RRR(CMULAF, 0, X0):
     case OE_RRR(CMULA, 0, X0):
     case OE_RRR(CMULFR, 0, X0):
@@ -886,13 +906,25 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext,
         tcg_gen_andi_tl(tdest, tsrca, imm);
         mnemonic = "andi";
         break;
+    case OE(CMPEQI_OPCODE_Y0, 0, Y0):
+    case OE(CMPEQI_OPCODE_Y1, 0, Y1):
     case OE_IM(CMPEQI, X0):
     case OE_IM(CMPEQI, X1):
+        tcg_gen_setcondi_tl(TCG_COND_EQ, tdest, tsrca, imm);
+        mnemonic = "cmpeqi";
+        break;
+    case OE(CMPLTSI_OPCODE_Y0, 0, Y0):
+    case OE(CMPLTSI_OPCODE_Y1, 0, Y1):
     case OE_IM(CMPLTSI, X0):
     case OE_IM(CMPLTSI, X1):
+        tcg_gen_setcondi_tl(TCG_COND_LT, tdest, tsrca, imm);
+        mnemonic = "cmpltsi";
+        break;
     case OE_IM(CMPLTUI, X0):
     case OE_IM(CMPLTUI, X1):
-        return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
+        tcg_gen_setcondi_tl(TCG_COND_LTU, tdest, tsrca, imm);
+        mnemonic = "cmpltui";
+        break;
     case OE_IM(LD1S_ADD, X1):
         memop = MO_SB;
         mnemonic = "ld1s_add";
@@ -1042,11 +1074,6 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext,
         tcg_gen_ext32s_tl(tdest, tdest);
         mnemonic = "addxli";
         break;
-    case OE(CMPEQI_OPCODE_Y0, 0, Y0):
-    case OE(CMPEQI_OPCODE_Y1, 0, Y1):
-    case OE(CMPLTSI_OPCODE_Y0, 0, Y0):
-    case OE(CMPLTSI_OPCODE_Y1, 0, Y1):
-        return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
     case OE(SHL16INSLI_OPCODE_X0, 0, X0):
     case OE(SHL16INSLI_OPCODE_X1, 0, X1):
         tcg_gen_shli_tl(tdest, tsrca, 16);
-- 
2.4.3

  parent reply	other threads:[~2015-09-14 22:44 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-14 22:43 [Qemu-devel] [PATCH v16 00/35] TileGX basic instructions Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 01/35] linux-user: tilegx: Add architecture related features Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 02/35] linux-user: Support tilegx architecture in linux-user Richard Henderson
2015-09-15 10:45   ` Peter Maydell
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 03/35] linux-user: Conditionalize syscalls which are not defined in tilegx Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 04/35] target-tilegx: Add opcode basic implementation from Tilera Corporation Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 05/35] target-tilegx: Modify opcode_tilegx.h to fit QEMU usage Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 06/35] target-tilegx: Modify _SPECIAL_ opcodes Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 07/35] target-tilegx: Fix LDNA_ADD_IMM8_OPCODE_X1 Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 08/35] target-tilegx: Add special register information from Tilera Corporation Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 09/35] target-tilegx: Add cpu basic features for linux-user Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 10/35] target-tilegx: Add several helpers for instructions translation Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 11/35] target-tilegx: Framework for decoding bundles Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 12/35] target-tilegx: Generate SEGV properly Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 13/35] target-tilegx: Add TILE-Gx building files Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 14/35] target-tilegx: Handle simple logical operations Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 15/35] target-tilegx: Handle arithmetic instructions Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 16/35] host-utils: Add revbit functions Richard Henderson
2015-09-15 10:00   ` Peter Maydell
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 17/35] target-arm: Use new " Richard Henderson
2015-09-15 10:01   ` Peter Maydell
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 18/35] target-tilegx: Handle most bit manipulation instructions Richard Henderson
2015-09-15 10:02   ` Peter Maydell
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 19/35] target-tilegx: Handle basic load and store instructions Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 20/35] target-tilegx: Handle post-increment " Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 21/35] target-tilegx: Handle unconditional jump instructions Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 22/35] target-tilegx: Handle conditional branch instructions Richard Henderson
2015-09-14 22:43 ` Richard Henderson [this message]
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 24/35] target-tilegx: Implement system and memory management instructions Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 25/35] target-tilegx: Handle bitfield instructions Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 26/35] target-tilegx: Handle shift instructions Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 27/35] target-tilegx: Handle conditional move instructions Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 28/35] target-tilegx: Handle scalar multiply instructions Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 29/35] target-tilegx: Handle mask instructions Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 30/35] target-tilegx: Handle v1cmpeq, v1cmpne Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 31/35] target-tilegx: Handle mtspr, mfspr Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 32/35] target-tilegx: Handle atomic instructions Richard Henderson
2015-09-15 10:46   ` Peter Maydell
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 33/35] target-tilegx: Handle v4int_l/h Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 34/35] target-tilegx: Handle v1shli, v1shrui Richard Henderson
2015-09-14 22:43 ` [Qemu-devel] [PATCH v16 35/35] target-tilegx: Handle v1shl, v1shru, v1shrs Richard Henderson
2015-09-15 11:03   ` Peter Maydell
2015-09-15 11:04 ` [Qemu-devel] [PATCH v16 00/35] TileGX basic instructions Peter Maydell

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