From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36447) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbrmY-0002gt-Sl for qemu-devel@nongnu.org; Tue, 15 Sep 2015 11:04:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZbrmX-0006QB-BF for qemu-devel@nongnu.org; Tue, 15 Sep 2015 11:04:30 -0400 Received: from mail-pa0-x22a.google.com ([2607:f8b0:400e:c03::22a]:34448) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbrmX-0006Q0-3t for qemu-devel@nongnu.org; Tue, 15 Sep 2015 11:04:29 -0400 Received: by padhy16 with SMTP id hy16so179115187pad.1 for ; Tue, 15 Sep 2015 08:04:28 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Tue, 15 Sep 2015 08:03:50 -0700 Message-Id: <1442329453-16260-13-git-send-email-rth@twiddle.net> In-Reply-To: <1442329453-16260-1-git-send-email-rth@twiddle.net> References: <1442329453-16260-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 12/35] target-tilegx: Generate SEGV properly List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, gang.chen.5i5j@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/main.c | 3 +++ target-tilegx/cpu.c | 5 ++++- target-tilegx/cpu.h | 2 ++ 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/linux-user/main.c b/linux-user/main.c index 7ecb018..4b579c9 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -3460,6 +3460,9 @@ void cpu_loop(CPUTLGState *env) case TILEGX_EXCP_REG_UDN_ACCESS: gen_sigill_reg(env); break; + case TILEGX_EXCP_SEGV: + gen_sigsegv_maperr(env, env->excaddr); + break; default: fprintf(stderr, "trapnr is %d[0x%x].\n", trapnr, trapnr); g_assert_not_reached(); diff --git a/target-tilegx/cpu.c b/target-tilegx/cpu.c index 87aee24..78b73e4 100644 --- a/target-tilegx/cpu.c +++ b/target-tilegx/cpu.c @@ -119,7 +119,10 @@ static void tilegx_cpu_do_interrupt(CPUState *cs) static int tilegx_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, int mmu_idx) { - cpu_dump_state(cs, stderr, fprintf, 0); + TileGXCPU *cpu = TILEGX_CPU(cs); + + cs->exception_index = TILEGX_EXCP_SEGV; + cpu->env.excaddr = address; return 1; } diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h index 2c86cd3..3a62d20 100644 --- a/target-tilegx/cpu.h +++ b/target-tilegx/cpu.h @@ -60,6 +60,7 @@ enum { typedef enum { TILEGX_EXCP_NONE = 0, TILEGX_EXCP_SYSCALL = 1, + TILEGX_EXCP_SEGV = 2, TILEGX_EXCP_OPCODE_UNKNOWN = 0x101, TILEGX_EXCP_OPCODE_UNIMPLEMENTED = 0x102, TILEGX_EXCP_OPCODE_CMPEXCH = 0x103, @@ -87,6 +88,7 @@ typedef struct CPUTLGState { #if defined(CONFIG_USER_ONLY) uint32_t excparam; /* exception parameter */ + uint64_t excaddr; /* exception address */ #endif CPU_COMMON -- 2.4.3