From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36795) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zbrmu-0003D4-6C for qemu-devel@nongnu.org; Tue, 15 Sep 2015 11:04:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zbrmq-0006bE-7z for qemu-devel@nongnu.org; Tue, 15 Sep 2015 11:04:52 -0400 Received: from mail-pa0-x233.google.com ([2607:f8b0:400e:c03::233]:33339) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zbrmq-0006aH-00 for qemu-devel@nongnu.org; Tue, 15 Sep 2015 11:04:48 -0400 Received: by pacex6 with SMTP id ex6so179544780pac.0 for ; Tue, 15 Sep 2015 08:04:47 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Tue, 15 Sep 2015 08:04:07 -0700 Message-Id: <1442329453-16260-30-git-send-email-rth@twiddle.net> In-Reply-To: <1442329453-16260-1-git-send-email-rth@twiddle.net> References: <1442329453-16260-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 29/35] target-tilegx: Handle mask instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, gang.chen.5i5j@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-tilegx/translate.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index 673b441..8b7c719 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -643,11 +643,15 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(FSINGLE_MUL2, 0, X0): case OE_RRR(FSINGLE_PACK2, 0, X0): case OE_RRR(FSINGLE_SUB1, 0, X0): + return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(MNZ, 0, X0): case OE_RRR(MNZ, 0, X1): case OE_RRR(MNZ, 4, Y0): case OE_RRR(MNZ, 4, Y1): - return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; + t0 = load_zero(dc); + tcg_gen_movcond_tl(TCG_COND_NE, tdest, tsrca, t0, tsrcb, t0); + mnemonic = "mnz"; + break; case OE_RRR(MULAX, 0, X0): case OE_RRR(MULAX, 3, Y0): tcg_gen_mul_tl(tdest, tsrca, tsrcb); @@ -763,7 +767,10 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(MZ, 0, X1): case OE_RRR(MZ, 4, Y0): case OE_RRR(MZ, 4, Y1): - return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; + t0 = load_zero(dc); + tcg_gen_movcond_tl(TCG_COND_EQ, tdest, tsrca, t0, tsrcb, t0); + mnemonic = "mz"; + break; case OE_RRR(NOR, 0, X0): case OE_RRR(NOR, 0, X1): case OE_RRR(NOR, 5, Y0): -- 2.4.3