From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55051) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zc9Vg-0004sb-Tr for qemu-devel@nongnu.org; Wed, 16 Sep 2015 06:00:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zc9Vc-0001FC-OM for qemu-devel@nongnu.org; Wed, 16 Sep 2015 06:00:16 -0400 Received: from mailhub.sw.ru ([195.214.232.25]:47869 helo=relay.sw.ru) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zc9Vc-0000vh-BM for qemu-devel@nongnu.org; Wed, 16 Sep 2015 06:00:12 -0400 From: "Denis V. Lunev" Date: Wed, 16 Sep 2015 12:59:42 +0300 Message-Id: <1442397584-16698-2-git-send-email-den@openvz.org> In-Reply-To: <1442397584-16698-1-git-send-email-den@openvz.org> References: <1442397584-16698-1-git-send-email-den@openvz.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 1/3] target-i386/kvm: Hyper-V HV_X64_MSR_RESET support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Marcelo Tosatti , qemu-devel@nongnu.org, Paolo Bonzini , Andrey Smetanin , "Denis V. Lunev" , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson From: Andrey Smetanin HV_X64_MSR_RESET msr is used by Hyper-V based Windows guest to reset guest VM by hypervisor. This msr is stateless so no migration/fetch/update is required. This code checks cpu option "hv-reset" and support by kernel. If both conditions are met appropriate Hyper-V features cpuid bit is set. Signed-off-by: Andrey Smetanin Signed-off-by: Denis V. Lunev CC: Paolo Bonzini CC: Richard Henderson CC: Eduardo Habkost CC: "Andreas F=C3=A4rber" CC: Marcelo Tosatti --- linux-headers/asm-x86/hyperv.h | 3 +++ target-i386/cpu-qom.h | 1 + target-i386/cpu.c | 1 + target-i386/kvm.c | 11 ++++++++++- 4 files changed, 15 insertions(+), 1 deletion(-) diff --git a/linux-headers/asm-x86/hyperv.h b/linux-headers/asm-x86/hyper= v.h index 8fba544..ba3a63b 100644 --- a/linux-headers/asm-x86/hyperv.h +++ b/linux-headers/asm-x86/hyperv.h @@ -149,6 +149,9 @@ /* MSR used to provide vcpu index */ #define HV_X64_MSR_VP_INDEX 0x40000002 =20 +/* MSR used to reset the guest OS. */ +#define HV_X64_MSR_RESET 0x40000003 + /* MSR used to read the per-partition time reference counter */ #define HV_X64_MSR_TIME_REF_COUNT 0x40000020 =20 diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index 7a4fddd..3789a2f 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -89,6 +89,7 @@ typedef struct X86CPU { bool hyperv_relaxed_timing; int hyperv_spinlock_attempts; bool hyperv_time; + bool hyperv_reset; bool check_cpuid; bool enforce_cpuid; bool expose_kvm; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index cfb8aa7..21828ad 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -3121,6 +3121,7 @@ static Property x86_cpu_properties[] =3D { DEFINE_PROP_BOOL("hv-relaxed", X86CPU, hyperv_relaxed_timing, false)= , DEFINE_PROP_BOOL("hv-vapic", X86CPU, hyperv_vapic, false), DEFINE_PROP_BOOL("hv-time", X86CPU, hyperv_time, false), + DEFINE_PROP_BOOL("hv-reset", X86CPU, hyperv_reset, false), DEFINE_PROP_BOOL("check", X86CPU, check_cpuid, false), DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false), DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true), diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 066d03d..37e82fb 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -80,6 +80,7 @@ static int lm_capable_kernel; static bool has_msr_hv_hypercall; static bool has_msr_hv_vapic; static bool has_msr_hv_tsc; +static bool has_msr_hv_reset; static bool has_msr_mtrr; static bool has_msr_xss; =20 @@ -457,7 +458,8 @@ static bool hyperv_enabled(X86CPU *cpu) return kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV) > 0 && (hyperv_hypercall_available(cpu) || cpu->hyperv_time || - cpu->hyperv_relaxed_timing); + cpu->hyperv_relaxed_timing || + cpu->hyperv_reset); } =20 static Error *invtsc_mig_blocker; @@ -523,6 +525,9 @@ int kvm_arch_init_vcpu(CPUState *cs) c->eax |=3D 0x200; has_msr_hv_tsc =3D true; } + if (cpu->hyperv_reset && has_msr_hv_reset) { + c->eax |=3D HV_X64_MSR_RESET_AVAILABLE; + } c =3D &cpuid_data.entries[cpuid_i++]; c->function =3D HYPERV_CPUID_ENLIGHTMENT_INFO; if (cpu->hyperv_relaxed_timing) { @@ -843,6 +848,10 @@ static int kvm_get_supported_msrs(KVMState *s) has_msr_xss =3D true; continue; } + if (kvm_msr_list->indices[i] =3D=3D HV_X64_MSR_RESET) { + has_msr_hv_reset =3D true; + continue; + } } } =20 --=20 2.1.4