From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43849) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZdCPe-0008FA-5T for qemu-devel@nongnu.org; Sat, 19 Sep 2015 03:18:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZdCPc-0003qS-Ak for qemu-devel@nongnu.org; Sat, 19 Sep 2015 03:18:22 -0400 From: David Gibson Date: Sat, 19 Sep 2015 17:18:28 +1000 Message-Id: <1442647117-2726-6-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1442647117-2726-1-git-send-email-david@gibson.dropbear.id.au> References: <1442647117-2726-1-git-send-email-david@gibson.dropbear.id.au> Subject: [Qemu-devel] [RFC PATCH 05/14] spapr_pci: Fold spapr_phb_vfio_eeh_reset() into spapr_pci code List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: gwshan@linux.vnet.ibm.com, alex.williamson@redhat.com, aik@ozlabs.ru Cc: lvivier@redhat.com, thuth@redhat.com, mdroth@linux.vnet.ibm.com, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, David Gibson Because spapr_phb_check_vfio_group() now safely returns an error on a non VFIO papr host bridge, it becomes safe to call spapr_phb_vfio_eeh_reset() on any host bridge, not just the special VFIO host bridges. So fold its code into rtas_ibm_set_slot_reset(), instead of only calling it via a class method. Signed-off-by: David Gibson --- hw/ppc/spapr_pci.c | 76 ++++++++++++++++++++++++++++++++++++++++--- hw/ppc/spapr_pci_vfio.c | 79 --------------------------------------------- include/hw/pci-host/spapr.h | 1 - 3 files changed, 71 insertions(+), 85 deletions(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 2da5991..30a7468 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -561,6 +561,48 @@ param_error_exit: rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); } +static void spapr_phb_eeh_clear_dev_msix(PCIBus *bus, PCIDevice *pdev, + void *opaque) +{ + /* Check if the device is VFIO PCI device */ + if (!object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { + return; + } + + /* + * The MSIx table will be cleaned out by reset. We need + * disable it so that it can be reenabled properly. Also, + * the cached MSIx table should be cleared as it's not + * reflecting the contents in hardware. + */ + if (msix_enabled(pdev)) { + uint16_t flags; + + flags = pci_host_config_read_common(pdev, + pdev->msix_cap + PCI_MSIX_FLAGS, + pci_config_size(pdev), 2); + flags &= ~PCI_MSIX_FLAGS_ENABLE; + pci_host_config_write_common(pdev, + pdev->msix_cap + PCI_MSIX_FLAGS, + pci_config_size(pdev), flags, 2); + } + + msix_reset(pdev); +} + +static void spapr_phb_eeh_clear_bus_msix(PCIBus *bus, void *opaque) +{ + pci_for_each_device(bus, pci_bus_num(bus), + spapr_phb_eeh_clear_dev_msix, NULL); +} + +static void spapr_phb_eeh_pre_reset(sPAPRPHBState *sphb) +{ + PCIHostState *phb = PCI_HOST_BRIDGE(sphb); + + pci_for_each_bus(phb->bus, spapr_phb_eeh_clear_bus_msix, NULL); +} + static void rtas_ibm_set_slot_reset(PowerPCCPU *cpu, sPAPRMachineState *spapr, uint32_t token, uint32_t nargs, @@ -568,9 +610,10 @@ static void rtas_ibm_set_slot_reset(PowerPCCPU *cpu, target_ulong rets) { sPAPRPHBState *sphb; - sPAPRPHBClass *spc; + VFIOGroup *group; uint32_t option; uint64_t buid; + uint32_t op; int ret; if ((nargs != 4) || (nret != 1)) { @@ -584,13 +627,36 @@ static void rtas_ibm_set_slot_reset(PowerPCCPU *cpu, goto param_error_exit; } - spc = SPAPR_PCI_HOST_BRIDGE_GET_CLASS(sphb); - if (!spc->eeh_reset) { + + ret = spapr_phb_check_vfio_group(sphb, &group); + if (ret != RTAS_OUT_SUCCESS) { + rtas_st(rets, 0, ret); + return; + } + + switch (option) { + case RTAS_SLOT_RESET_DEACTIVATE: + op = VFIO_EEH_PE_RESET_DEACTIVATE; + break; + case RTAS_SLOT_RESET_HOT: + spapr_phb_eeh_pre_reset(sphb); + op = VFIO_EEH_PE_RESET_HOT; + break; + case RTAS_SLOT_RESET_FUNDAMENTAL: + spapr_phb_eeh_pre_reset(sphb); + op = VFIO_EEH_PE_RESET_FUNDAMENTAL; + break; + default: goto param_error_exit; } - ret = spc->eeh_reset(sphb, option); - rtas_st(rets, 0, ret); + ret = vfio_eeh_op(group, op); + if (ret < 0) { + rtas_st(rets, 0, RTAS_OUT_HW_ERROR); + return; + } + + rtas_st(rets, 0, RTAS_OUT_SUCCESS); return; param_error_exit: diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c index a13fb0a..84186fa 100644 --- a/hw/ppc/spapr_pci_vfio.c +++ b/hw/ppc/spapr_pci_vfio.c @@ -186,84 +186,6 @@ static int spapr_phb_vfio_eeh_get_state(sPAPRPHBState *sphb, int *state) return RTAS_OUT_SUCCESS; } -static void spapr_phb_vfio_eeh_clear_dev_msix(PCIBus *bus, - PCIDevice *pdev, - void *opaque) -{ - /* Check if the device is VFIO PCI device */ - if (!object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { - return; - } - - /* - * The MSIx table will be cleaned out by reset. We need - * disable it so that it can be reenabled properly. Also, - * the cached MSIx table should be cleared as it's not - * reflecting the contents in hardware. - */ - if (msix_enabled(pdev)) { - uint16_t flags; - - flags = pci_host_config_read_common(pdev, - pdev->msix_cap + PCI_MSIX_FLAGS, - pci_config_size(pdev), 2); - flags &= ~PCI_MSIX_FLAGS_ENABLE; - pci_host_config_write_common(pdev, - pdev->msix_cap + PCI_MSIX_FLAGS, - pci_config_size(pdev), flags, 2); - } - - msix_reset(pdev); -} - -static void spapr_phb_vfio_eeh_clear_bus_msix(PCIBus *bus, void *opaque) -{ - pci_for_each_device(bus, pci_bus_num(bus), - spapr_phb_vfio_eeh_clear_dev_msix, NULL); -} - -static void spapr_phb_vfio_eeh_pre_reset(sPAPRPHBState *sphb) -{ - PCIHostState *phb = PCI_HOST_BRIDGE(sphb); - - pci_for_each_bus(phb->bus, spapr_phb_vfio_eeh_clear_bus_msix, NULL); -} - -static int spapr_phb_vfio_eeh_reset(sPAPRPHBState *sphb, int option) -{ - VFIOGroup *group; - uint32_t op; - int ret; - - ret = spapr_phb_check_vfio_group(sphb, &group); - if (ret != RTAS_OUT_SUCCESS) { - return ret; - } - - switch (option) { - case RTAS_SLOT_RESET_DEACTIVATE: - op = VFIO_EEH_PE_RESET_DEACTIVATE; - break; - case RTAS_SLOT_RESET_HOT: - spapr_phb_vfio_eeh_pre_reset(sphb); - op = VFIO_EEH_PE_RESET_HOT; - break; - case RTAS_SLOT_RESET_FUNDAMENTAL: - spapr_phb_vfio_eeh_pre_reset(sphb); - op = VFIO_EEH_PE_RESET_FUNDAMENTAL; - break; - default: - return RTAS_OUT_PARAM_ERROR; - } - - ret = vfio_eeh_op(group, op); - if (ret < 0) { - return RTAS_OUT_HW_ERROR; - } - - return RTAS_OUT_SUCCESS; -} - static void spapr_phb_vfio_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -274,7 +196,6 @@ static void spapr_phb_vfio_class_init(ObjectClass *klass, void *data) spc->finish_realize = spapr_phb_vfio_finish_realize; spc->eeh_set_option = spapr_phb_vfio_eeh_set_option; spc->eeh_get_state = spapr_phb_vfio_eeh_get_state; - spc->eeh_reset = spapr_phb_vfio_eeh_reset; } static const TypeInfo spapr_phb_vfio_info = { diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index d5d98ec..f0b9fc3 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -52,7 +52,6 @@ struct sPAPRPHBClass { void (*finish_realize)(sPAPRPHBState *sphb, Error **errp); int (*eeh_set_option)(sPAPRPHBState *sphb, unsigned int addr, int option); int (*eeh_get_state)(sPAPRPHBState *sphb, int *state); - int (*eeh_reset)(sPAPRPHBState *sphb, int option); }; typedef struct spapr_pci_msi { -- 2.4.3