From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42744) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZdIvU-0005IZ-Ag for qemu-devel@nongnu.org; Sat, 19 Sep 2015 10:15:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZdIvT-0002qR-5S for qemu-devel@nongnu.org; Sat, 19 Sep 2015 10:15:40 -0400 Received: from mail-pa0-x235.google.com ([2607:f8b0:400e:c03::235]:36334) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZdIvS-0002py-MP for qemu-devel@nongnu.org; Sat, 19 Sep 2015 10:15:39 -0400 Received: by padhk3 with SMTP id hk3so75671890pad.3 for ; Sat, 19 Sep 2015 07:15:38 -0700 (PDT) From: "Edgar E. Iglesias" Date: Sat, 19 Sep 2015 07:15:20 -0700 Message-Id: <1442672127-26223-2-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1442672127-26223-1-git-send-email-edgar.iglesias@gmail.com> References: <1442672127-26223-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH RFC 1/8] target-arm: Add HPFAR_EL2 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- target-arm/cpu.h | 1 + target-arm/helper.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 1b80516..e7694a5 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -280,6 +280,7 @@ typedef struct CPUARMState { }; uint64_t far_el[4]; }; + uint64_t hpfar_el2; union { /* Translation result. */ struct { uint64_t _unused_par_0; diff --git a/target-arm/helper.c b/target-arm/helper.c index 12ea88f..b709582 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3221,6 +3221,9 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = { { .name = "CNTHP_CTL_EL2", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 4, .crn = 14, .crm = 2, .opc2 = 1, .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, + { .name = "HPFAR_EL2", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, + .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, REGINFO_SENTINEL }; @@ -3442,6 +3445,10 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { .resetvalue = 0, .writefn = gt_hyp_ctl_write, .raw_writefn = raw_write }, #endif + { .name = "HPFAR_EL2", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, + .access = PL2_RW, + .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) }, REGINFO_SENTINEL }; -- 1.9.1