From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38756) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZeU8P-0005CE-PM for qemu-devel@nongnu.org; Tue, 22 Sep 2015 16:25:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZeU8O-00019B-85 for qemu-devel@nongnu.org; Tue, 22 Sep 2015 16:25:53 -0400 Received: from mail-ig0-x234.google.com ([2607:f8b0:4001:c05::234]:33234) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZeU8N-00018x-O6 for qemu-devel@nongnu.org; Tue, 22 Sep 2015 16:25:51 -0400 Received: by igbkq10 with SMTP id kq10so107194545igb.0 for ; Tue, 22 Sep 2015 13:25:51 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Tue, 22 Sep 2015 13:24:51 -0700 Message-Id: <1442953507-4074-10-git-send-email-rth@twiddle.net> In-Reply-To: <1442953507-4074-1-git-send-email-rth@twiddle.net> References: <1442953507-4074-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v3 09/25] target-s390x: Add cc_op state to insn_start List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, aurelien@aurel32.net Reviewed-by: Aurelien Jarno Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-s390x/cpu.h | 1 + target-s390x/translate.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index 9aeb024..68d6528 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -43,6 +43,7 @@ #include "fpu/softfloat.h" #define NB_MMU_MODES 3 +#define TARGET_INSN_START_EXTRA_WORDS 1 #define MMU_MODE0_SUFFIX _primary #define MMU_MODE1_SUFFIX _secondary diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 4959828..6bbc760 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -5369,7 +5369,7 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu, tcg_ctx.gen_opc_instr_start[lj] = 1; tcg_ctx.gen_opc_icount[lj] = num_insns; } - tcg_gen_insn_start(dc.pc); + tcg_gen_insn_start(dc.pc, dc.cc_op); num_insns++; if (unlikely(cpu_breakpoint_test(cs, dc.pc, BP_ANY))) { -- 2.4.3