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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH v3 16/25] tcg: Merge cpu_gen_code into tb_gen_code
Date: Tue, 22 Sep 2015 13:24:58 -0700	[thread overview]
Message-ID: <1442953507-4074-17-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1442953507-4074-1-git-send-email-rth@twiddle.net>

As it's only caller, this tidies things a bit.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 include/exec/exec-all.h |   2 -
 translate-all.c         | 131 ++++++++++++++++++++++--------------------------
 2 files changed, 59 insertions(+), 74 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index a3719b7..5340745 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -78,8 +78,6 @@ void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb,
                           int pc_pos);
 
 void cpu_gen_init(void);
-int cpu_gen_code(CPUArchState *env, struct TranslationBlock *tb,
-                 int *gen_code_size_ptr);
 bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc);
 void page_size_init(void);
 
diff --git a/translate-all.c b/translate-all.c
index 4a9ee33..19c2988 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -168,73 +168,7 @@ void cpu_gen_init(void)
     tcg_context_init(&tcg_ctx); 
 }
 
-/* return non zero if the very first instruction is invalid so that
- * the virtual CPU can trigger an exception.
- *
- * '*gen_code_size_ptr' contains the size of the generated code (host
- * code).
- *
- * Called with mmap_lock held for user-mode emulation.
- */
-int cpu_gen_code(CPUArchState *env, TranslationBlock *tb, int *gen_code_size_ptr)
-{
-    TCGContext *s = &tcg_ctx;
-    tcg_insn_unit *gen_code_buf;
-    int gen_code_size;
-#ifdef CONFIG_PROFILER
-    int64_t ti;
-#endif
-
-#ifdef CONFIG_PROFILER
-    s->tb_count1++; /* includes aborted translations because of
-                       exceptions */
-    ti = profile_getclock();
-#endif
-    tcg_func_start(s);
-
-    gen_intermediate_code(env, tb);
-
-    trace_translate_block(tb, tb->pc, tb->tc_ptr);
-
-    /* generate machine code */
-    gen_code_buf = tb->tc_ptr;
-    tb->tb_next_offset[0] = 0xffff;
-    tb->tb_next_offset[1] = 0xffff;
-    s->tb_next_offset = tb->tb_next_offset;
-#ifdef USE_DIRECT_JUMP
-    s->tb_jmp_offset = tb->tb_jmp_offset;
-    s->tb_next = NULL;
-#else
-    s->tb_jmp_offset = NULL;
-    s->tb_next = tb->tb_next;
-#endif
-
-#ifdef CONFIG_PROFILER
-    s->tb_count++;
-    s->interm_time += profile_getclock() - ti;
-    s->code_time -= profile_getclock();
-#endif
-    gen_code_size = tcg_gen_code(s, gen_code_buf);
-    *gen_code_size_ptr = gen_code_size;
-#ifdef CONFIG_PROFILER
-    s->code_time += profile_getclock();
-    s->code_in_len += tb->size;
-    s->code_out_len += gen_code_size;
-#endif
-
-#ifdef DEBUG_DISAS
-    if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
-        qemu_log("OUT: [size=%d]\n", gen_code_size);
-        log_disas(tb->tc_ptr, gen_code_size);
-        qemu_log("\n");
-        qemu_log_flush();
-    }
-#endif
-    return 0;
-}
-
-/* The cpu state corresponding to 'searched_pc' is restored.
- */
+/* The cpu state corresponding to 'searched_pc' is restored.  */
 static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
                                      uintptr_t searched_pc)
 {
@@ -1034,7 +968,11 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
     TranslationBlock *tb;
     tb_page_addr_t phys_pc, phys_page2;
     target_ulong virt_page2;
-    int code_gen_size;
+    tcg_insn_unit *gen_code_buf;
+    int gen_code_size;
+#ifdef CONFIG_PROFILER
+    int64_t ti;
+#endif
 
     phys_pc = get_page_addr_code(env, pc);
     if (use_icount) {
@@ -1049,13 +987,62 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
         /* Don't forget to invalidate previous TB info.  */
         tcg_ctx.tb_ctx.tb_invalidated_flag = 1;
     }
-    tb->tc_ptr = tcg_ctx.code_gen_ptr;
+
+    gen_code_buf = tcg_ctx.code_gen_ptr;
+    tb->tc_ptr = gen_code_buf;
     tb->cs_base = cs_base;
     tb->flags = flags;
     tb->cflags = cflags;
-    cpu_gen_code(env, tb, &code_gen_size);
-    tcg_ctx.code_gen_ptr = (void *)(((uintptr_t)tcg_ctx.code_gen_ptr +
-            code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));
+
+#ifdef CONFIG_PROFILER
+    tcg_ctx.tb_count1++; /* includes aborted translations because of
+                       exceptions */
+    ti = profile_getclock();
+#endif
+
+    tcg_func_start(&tcg_ctx);
+
+    gen_intermediate_code(env, tb);
+
+    trace_translate_block(tb, tb->pc, tb->tc_ptr);
+
+    /* generate machine code */
+    tb->tb_next_offset[0] = 0xffff;
+    tb->tb_next_offset[1] = 0xffff;
+    tcg_ctx.tb_next_offset = tb->tb_next_offset;
+#ifdef USE_DIRECT_JUMP
+    tcg_ctx.tb_jmp_offset = tb->tb_jmp_offset;
+    tcg_ctx.tb_next = NULL;
+#else
+    tcg_ctx.tb_jmp_offset = NULL;
+    tcg_ctx.tb_next = tb->tb_next;
+#endif
+
+#ifdef CONFIG_PROFILER
+    tcg_ctx.tb_count++;
+    tcg_ctx.interm_time += profile_getclock() - ti;
+    tcg_ctx.code_time -= profile_getclock();
+#endif
+
+    gen_code_size = tcg_gen_code(&tcg_ctx, gen_code_buf);
+
+#ifdef CONFIG_PROFILER
+    tcg_ctx.code_time += profile_getclock();
+    tcg_ctx.code_in_len += tb->size;
+    tcg_ctx.code_out_len += gen_code_size;
+#endif
+
+#ifdef DEBUG_DISAS
+    if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
+        qemu_log("OUT: [size=%d]\n", gen_code_size);
+        log_disas(tb->tc_ptr, gen_code_size);
+        qemu_log("\n");
+        qemu_log_flush();
+    }
+#endif
+
+    tcg_ctx.code_gen_ptr = (void *)(((uintptr_t)gen_code_buf +
+            gen_code_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));
 
     /* check next page if needed */
     virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK;
-- 
2.4.3

  parent reply	other threads:[~2015-09-22 20:26 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-22 20:24 [Qemu-devel] [PATCH v3 00/25] Do away with TB retranslation Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 01/25] tcg: Rename debug_insn_start to insn_start Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 02/25] target-*: Unconditionally emit tcg_gen_insn_start Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 03/25] target-*: Increment num_insns immediately after tcg_gen_insn_start Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 04/25] target-*: Introduce and use cpu_breakpoint_test Richard Henderson
2015-09-23 19:19   ` Peter Maydell
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 05/25] tcg: Allow extra data to be attached to insn_start Richard Henderson
2015-09-23 14:55   ` Kevin O'Connor
2015-09-23 16:37     ` Richard Henderson
2015-09-23 16:38     ` Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 06/25] target-arm: Add condexec state " Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 07/25] target-i386: Add cc_op " Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 08/25] target-mips: Add delayed branch " Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 09/25] target-s390x: Add cc_op " Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 10/25] target-sh4: Add flags " Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 11/25] target-cris: Mirror gen_opc_pc into insn_start Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 12/25] target-sparc: Tidy gen_branch_a interface Richard Henderson
2015-09-22 21:23   ` Aurelien Jarno
2015-09-24 19:42   ` Aurelien Jarno
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 13/25] target-sparc: Split out gen_branch_n Richard Henderson
2015-09-24 19:42   ` Aurelien Jarno
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 14/25] target-sparc: Remove gen_opc_jump_pc Richard Henderson
2015-09-24 19:42   ` Aurelien Jarno
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 15/25] target-sparc: Add npc state to insn_start Richard Henderson
2015-09-24 19:42   ` Aurelien Jarno
2015-09-22 20:24 ` Richard Henderson [this message]
2015-09-24 19:48   ` [Qemu-devel] [PATCH v3 16/25] tcg: Merge cpu_gen_code into tb_gen_code Aurelien Jarno
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 17/25] target-*: Drop cpu_gen_code define Richard Henderson
2015-09-24 19:49   ` Aurelien Jarno
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 18/25] tcg: Add TCG_MAX_INSNS Richard Henderson
2015-09-24 20:02   ` Aurelien Jarno
2015-09-24 20:43     ` Richard Henderson
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 19/25] tcg: Pass data argument to restore_state_to_opc Richard Henderson
2015-09-24 20:11   ` Aurelien Jarno
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 20/25] tcg: Save insn data and use it in cpu_restore_state_from_tb Richard Henderson
2015-09-23 19:20   ` Peter Maydell
2015-09-25 21:10   ` Aurelien Jarno
2015-09-25 23:05     ` Richard Henderson
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 21/25] tcg: Remove gen_intermediate_code_pc Richard Henderson
2015-09-25 21:11   ` Aurelien Jarno
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 22/25] tcg: Remove tcg_gen_code_search_pc Richard Henderson
2015-09-25 21:11   ` Aurelien Jarno
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 23/25] tcg: Emit prologue to the beginning of code_gen_buffer Richard Henderson
2015-09-23 19:28   ` Peter Maydell
2015-09-23 19:39     ` Richard Henderson
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 24/25] tcg: Allocate a guard page after code_gen_buffer Richard Henderson
2015-09-23 19:39   ` Peter Maydell
2015-09-23 20:00     ` Richard Henderson
2015-09-23 20:37       ` Peter Maydell
2015-09-23 22:12         ` Richard Henderson
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 25/25] tcg: Check for overflow via highwater mark Richard Henderson
2015-09-23 19:42   ` Peter Maydell
2015-09-23 20:01     ` Richard Henderson

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