From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38758) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZeU8P-0005CI-RG for qemu-devel@nongnu.org; Tue, 22 Sep 2015 16:25:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZeU8M-00017y-1F for qemu-devel@nongnu.org; Tue, 22 Sep 2015 16:25:53 -0400 Received: from mail-ig0-x22a.google.com ([2607:f8b0:4001:c05::22a]:37725) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZeU8L-00017p-FT for qemu-devel@nongnu.org; Tue, 22 Sep 2015 16:25:49 -0400 Received: by igbni9 with SMTP id ni9so16835834igb.0 for ; Tue, 22 Sep 2015 13:25:49 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Tue, 22 Sep 2015 13:24:49 -0700 Message-Id: <1442953507-4074-8-git-send-email-rth@twiddle.net> In-Reply-To: <1442953507-4074-1-git-send-email-rth@twiddle.net> References: <1442953507-4074-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v3 07/25] target-i386: Add cc_op state to insn_start List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, aurelien@aurel32.net Reviewed-by: Aurelien Jarno Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-i386/cpu.h | 1 + target-i386/translate.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 5231e8c..717d558 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -794,6 +794,7 @@ typedef struct { #define MAX_GP_COUNTERS (MSR_IA32_PERF_STATUS - MSR_P6_EVNTSEL0) #define NB_MMU_MODES 3 +#define TARGET_INSN_START_EXTRA_WORDS 1 #define NB_OPMASK_REGS 8 diff --git a/target-i386/translate.c b/target-i386/translate.c index 9ec9c4c..7501b91 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -7949,7 +7949,7 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu, tcg_ctx.gen_opc_instr_start[lj] = 1; tcg_ctx.gen_opc_icount[lj] = num_insns; } - tcg_gen_insn_start(pc_ptr); + tcg_gen_insn_start(pc_ptr, dc->cc_op); num_insns++; /* If RF is set, suppress an internally generated breakpoint. */ -- 2.4.3