From: gang.chen.5i5j@gmail.com
To: peter.maydell@linaro.org, rth@twiddle.net
Cc: cmetcalf@ezchip.com, qemu-devel@nongnu.org,
xili_gchen_5257@hotmail.com, Chen Gang <gang.chen.5i5j@gmail.com>
Subject: [Qemu-devel] [PATCH] target-tilegx: Let x1 pipe process bpt instruction only
Date: Sat, 26 Sep 2015 07:42:54 +0800 [thread overview]
Message-ID: <1443224574-2718-1-git-send-email-gang.chen.5i5j@gmail.com> (raw)
From: Chen Gang <gang.chen.5i5j@gmail.com>
According to the related document, bpt can be only in x1 pipe.
Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
---
target-tilegx/translate.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index a9fc4ce..6622aeb 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -407,8 +407,14 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned opext,
mnemonic = "flushwb";
goto done0;
case OE_RR_X1(ILL):
+ if (dest == 0x1c && srca == 0x25) {
+ mnemonic = "bpt";
+ goto done2;
+ }
+ /* Fall through */
case OE_RR_Y1(ILL):
- mnemonic = (dest == 0x1c && srca == 0x25 ? "bpt" : "ill");
+ mnemonic = "ill";
+ done2:
qemu_log_mask(CPU_LOG_TB_IN_ASM, "%s", mnemonic);
return TILEGX_EXCP_OPCODE_UNKNOWN;
case OE_RR_X1(MF):
--
1.9.3
reply other threads:[~2015-09-25 23:43 UTC|newest]
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