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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: gang.chen.5i5j@gmail.com
Subject: [Qemu-devel] [PATCH 06/14] target-tilegx: Implement table index instructions
Date: Thu,  1 Oct 2015 12:38:38 +1000	[thread overview]
Message-ID: <1443667126-6257-7-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1443667126-6257-1-git-send-email-rth@twiddle.net>

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-tilegx/translate.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 3e5a8ea..9f86fd3 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -627,12 +627,27 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned opext,
         break;
     case OE_RR_X0(TBLIDXB0):
     case OE_RR_Y0(TBLIDXB0):
+        tcg_gen_deposit_tl(tdest, load_gr(dc, dest), tsrca, 2, 8);
+        mnemonic = "tblidxb0";
+        break;
     case OE_RR_X0(TBLIDXB1):
     case OE_RR_Y0(TBLIDXB1):
+        tcg_gen_shri_tl(tdest, tsrca, 8);
+        tcg_gen_deposit_tl(tdest, load_gr(dc, dest), tdest, 2, 8);
+        mnemonic = "tblidxb1";
+        break;
     case OE_RR_X0(TBLIDXB2):
     case OE_RR_Y0(TBLIDXB2):
+        tcg_gen_shri_tl(tdest, tsrca, 16);
+        tcg_gen_deposit_tl(tdest, load_gr(dc, dest), tdest, 2, 8);
+        mnemonic = "tblidxb2";
+        break;
     case OE_RR_X0(TBLIDXB3):
     case OE_RR_Y0(TBLIDXB3):
+        tcg_gen_shri_tl(tdest, tsrca, 24);
+        tcg_gen_deposit_tl(tdest, load_gr(dc, dest), tdest, 2, 8);
+        mnemonic = "tblidxb3";
+        break;
     default:
         return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
     }
-- 
2.4.3

  parent reply	other threads:[~2015-10-01  2:39 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-01  2:38 [Qemu-devel] [PATCH 00/14] Collected tilegx patches Richard Henderson
2015-10-01  2:38 ` [Qemu-devel] [PATCH 01/14] target-tilegx: Use V1 in simd_helper.c Richard Henderson
2015-10-01  2:38 ` [Qemu-devel] [PATCH 02/14] target-tilegx: Implement v*shl, v*shru, and v*shrs instructions Richard Henderson
2015-10-01  2:38 ` [Qemu-devel] [PATCH 03/14] target-tilegx: Implement v*add and v*sub instructions Richard Henderson
2015-10-01  2:38 ` [Qemu-devel] [PATCH 04/14] target-tilegx: Implement v1multu instruction Richard Henderson
2015-10-01  2:38 ` [Qemu-devel] [PATCH 05/14] target-tilegx: Implement crc instructions Richard Henderson
2015-10-01  2:38 ` Richard Henderson [this message]
2015-10-01  2:38 ` [Qemu-devel] [PATCH 07/14] target-tilegx: Implement complex multiply instructions Richard Henderson
2015-10-01  2:38 ` [Qemu-devel] [PATCH 08/14] target-tilegx: Let x1 pipe process bpt instruction only Richard Henderson
2015-10-01  2:38 ` [Qemu-devel] [PATCH 09/14] linux-user/syscall_defs.h: Sync the latest si_code from Linux kernel Richard Henderson
2015-10-01  2:38 ` [Qemu-devel] [PATCH 10/14] linux-user/tilegx: Implement tilegx signal features Richard Henderson
2015-10-01  2:38 ` [Qemu-devel] [PATCH 11/14] target-tilegx: Decode ill pseudo-instructions Richard Henderson
2015-10-01  2:38 ` [Qemu-devel] [PATCH 12/14] target-tilegx: Use TILEGX_EXCP_SIGNAL instead of TILEGX_EXCP_SEGV Richard Henderson
2015-10-01  2:38 ` [Qemu-devel] [PATCH 13/14] target-tilegx: Fix a typo for mnemonic about "ld_add" Richard Henderson
2015-10-01  2:38 ` [Qemu-devel] [PATCH 14/14] target-tilegx: Handle nofault prefetch instructions Richard Henderson
     [not found] ` <560D3DC0.7010500@hotmail.com>
2015-10-01 14:04   ` [Qemu-devel] [PATCH 00/14] Collected tilegx patches Chen Gang

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