From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37014) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zi2Lx-0003W9-P0 for qemu-devel@nongnu.org; Fri, 02 Oct 2015 11:34:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zi2Lt-000735-KQ for qemu-devel@nongnu.org; Fri, 02 Oct 2015 11:34:33 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:60385) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zi2Lt-00072U-FL for qemu-devel@nongnu.org; Fri, 02 Oct 2015 11:34:29 -0400 From: Yongbok Kim Date: Fri, 2 Oct 2015 16:34:01 +0100 Message-ID: <1443800041-57659-1-git-send-email-yongbok.kim@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PATCH] target-mips: fix updating XContext on mmu exception List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: leon.alrae@imgtec.com, aurelien@aurel32.net Correct updating XContext.Region field on mmu exceptions. If Config3.CTXTC = 0 then the R filed of XContext has to be updated with the value of bits 63..62 of the virtual address upon a TLB exception. Signed-off-by: Yongbok Kim --- target-mips/helper.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-mips/helper.c b/target-mips/helper.c index 01c4461..8ffc990 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -294,7 +294,7 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address, #if defined(TARGET_MIPS64) env->CP0_EntryHi &= env->SEGMask; env->CP0_XContext = (env->CP0_XContext & ((~0ULL) << (env->SEGBITS - 7))) | - ((address & 0xC00000000000ULL) >> (55 - env->SEGBITS)) | + (((address >> 62) & 0x3) << (env->SEGBITS - 9)) | ((address & ((1ULL << env->SEGBITS) - 1) & 0xFFFFFFFFFFFFE000ULL) >> 9); #endif cs->exception_index = exception; -- 1.7.1