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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 01/19] target-tilegx: Tidy simd_helper.c
Date: Wed,  7 Oct 2015 20:32:59 +1100	[thread overview]
Message-ID: <1444210397-20679-2-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1444210397-20679-1-git-send-email-rth@twiddle.net>

Using the V1 macro when we want to replicate a byte across
the 8 elements of the word.  Using deposit and extract for
manipulating specific elements.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-tilegx/simd_helper.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/target-tilegx/simd_helper.c b/target-tilegx/simd_helper.c
index b931929..f573f9b 100644
--- a/target-tilegx/simd_helper.c
+++ b/target-tilegx/simd_helper.c
@@ -23,12 +23,16 @@
 #include "exec/helper-proto.h"
 
 
+/* Broadcast a value to all elements of a vector.  */
+#define V1(X)      (((X) & 0xff) * 0x0101010101010101ull)
+
+
 uint64_t helper_v1shl(uint64_t a, uint64_t b)
 {
     uint64_t m;
 
     b &= 7;
-    m = 0x0101010101010101ULL * (0xff >> b);
+    m = V1(0xff >> b);
     return (a & m) << b;
 }
 
@@ -37,7 +41,7 @@ uint64_t helper_v1shru(uint64_t a, uint64_t b)
     uint64_t m;
 
     b &= 7;
-    m = 0x0101010101010101ULL * ((0xff << b) & 0xff);
+    m = V1(0xff << b);
     return (a & m) >> b;
 }
 
@@ -48,8 +52,7 @@ uint64_t helper_v1shrs(uint64_t a, uint64_t b)
 
     b &= 7;
     for (i = 0; i < 64; i += 8) {
-        int64_t ae = (int8_t)(a >> i);
-        r |= ((ae >> b) & 0xff) << i;
+        r = deposit64(r, i, 8, sextract64(a, i + b, 8 - b));
     }
     return r;
 }
-- 
2.4.3

  reply	other threads:[~2015-10-07  9:33 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-07  9:32 [Qemu-devel] [PULL 00/19] Collected tilegx patches Richard Henderson
2015-10-07  9:32 ` Richard Henderson [this message]
2015-10-07  9:33 ` [Qemu-devel] [PULL 02/19] target-tilegx: Implement v*shl, v*shru, and v*shrs instructions Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 03/19] target-tilegx: Implement v*add and v*sub instructions Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 04/19] target-tilegx: Implement v1multu instruction Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 05/19] target-tilegx: Implement crc instructions Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 06/19] target-tilegx: Implement table index instructions Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 07/19] target-tilegx: Implement complex multiply instructions Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 08/19] target-tilegx: Let x1 pipe process bpt instruction only Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 09/19] linux-user/syscall_defs.h: Sync the latest si_code from Linux kernel Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 11/19] target-tilegx: Decode ill pseudo-instructions Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 12/19] target-tilegx: Use TILEGX_EXCP_SIGNAL instead of TILEGX_EXCP_SEGV Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 13/19] target-tilegx: Fix a typo for mnemonic about "ld_add" Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 14/19] target-tilegx: Handle nofault prefetch instructions Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 15/19] target-tilegx: Implement v2sh* instructions Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 16/19] target-tilegx: Implement v?int_* instructions Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 17/19] target-tilegx: Implement v2mults instruction Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 18/19] target-tilegx: Use TILEGX_EXCP_OPCODE_UNKNOWN and TILEGX_EXCP_OPCODE_UNIMPLEMENTED correctly Richard Henderson
2015-10-07  9:33 ` [Qemu-devel] [PULL 19/19] target-tilegx: Support iret instruction and related special registers Richard Henderson
2015-10-08 13:18 ` [Qemu-devel] [PULL 00/19] Collected tilegx patches Peter Maydell

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