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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 12/26] target-sparc: Tidy gen_branch_a interface
Date: Wed,  7 Oct 2015 20:43:37 +1100	[thread overview]
Message-ID: <1444211031-11624-13-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1444211031-11624-1-git-send-email-rth@twiddle.net>

We always pass pc2 == dc->npc and r_cond == cpu_cond,
and always set is_br afterward.  Infer all of that.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-sparc/translate.c | 21 ++++++++++-----------
 1 file changed, 10 insertions(+), 11 deletions(-)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index f359ac9..cbc90d8 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -955,17 +955,19 @@ static inline void gen_branch2(DisasContext *dc, target_ulong pc1,
     gen_goto_tb(dc, 1, pc2, pc2 + 4);
 }
 
-static inline void gen_branch_a(DisasContext *dc, target_ulong pc1,
-                                target_ulong pc2, TCGv r_cond)
+static void gen_branch_a(DisasContext *dc, target_ulong pc1)
 {
     TCGLabel *l1 = gen_new_label();
+    target_ulong npc = dc->npc;
 
-    tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
+    tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_cond, 0, l1);
 
-    gen_goto_tb(dc, 0, pc2, pc1);
+    gen_goto_tb(dc, 0, npc, pc1);
 
     gen_set_label(l1);
-    gen_goto_tb(dc, 1, pc2 + 4, pc2 + 8);
+    gen_goto_tb(dc, 1, npc + 4, npc + 8);
+
+    dc->is_br = 1;
 }
 
 static inline void gen_generic_branch(DisasContext *dc)
@@ -1398,8 +1400,7 @@ static void do_branch(DisasContext *dc, int32_t offset, uint32_t insn, int cc)
         flush_cond(dc);
         gen_cond(cpu_cond, cc, cond, dc);
         if (a) {
-            gen_branch_a(dc, target, dc->npc, cpu_cond);
-            dc->is_br = 1;
+            gen_branch_a(dc, target);
         } else {
             dc->pc = dc->npc;
             dc->jump_pc[0] = target;
@@ -1447,8 +1448,7 @@ static void do_fbranch(DisasContext *dc, int32_t offset, uint32_t insn, int cc)
         flush_cond(dc);
         gen_fcond(cpu_cond, cc, cond);
         if (a) {
-            gen_branch_a(dc, target, dc->npc, cpu_cond);
-            dc->is_br = 1;
+            gen_branch_a(dc, target);
         } else {
             dc->pc = dc->npc;
             dc->jump_pc[0] = target;
@@ -1476,8 +1476,7 @@ static void do_branch_reg(DisasContext *dc, int32_t offset, uint32_t insn,
     flush_cond(dc);
     gen_cond_reg(cpu_cond, cond, r_reg);
     if (a) {
-        gen_branch_a(dc, target, dc->npc, cpu_cond);
-        dc->is_br = 1;
+        gen_branch_a(dc, target);
     } else {
         dc->pc = dc->npc;
         dc->jump_pc[0] = target;
-- 
2.4.3

  parent reply	other threads:[~2015-10-07  9:44 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-07  9:43 [Qemu-devel] [PULL 00/26] Do away with TB retranslation Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 01/26] tcg: Rename debug_insn_start to insn_start Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 02/26] target-*: Unconditionally emit tcg_gen_insn_start Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 03/26] target-*: Increment num_insns immediately after tcg_gen_insn_start Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 04/26] target-*: Introduce and use cpu_breakpoint_test Richard Henderson
2015-10-09 13:34   ` Sergey Fedorov
2015-10-13  0:13     ` Richard Henderson
2015-10-13  8:13       ` Peter Maydell
2015-10-13 13:40       ` Sergey Fedorov
2015-10-13 20:44         ` Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 05/26] tcg: Allow extra data to be attached to insn_start Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 06/26] target-arm: Add condexec state " Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 07/26] target-i386: Add cc_op " Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 08/26] target-mips: Add delayed branch " Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 09/26] target-s390x: Add cc_op " Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 10/26] target-sh4: Add flags " Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 11/26] target-cris: Mirror gen_opc_pc into insn_start Richard Henderson
2015-10-07  9:43 ` Richard Henderson [this message]
2015-10-07  9:43 ` [Qemu-devel] [PULL 13/26] target-sparc: Split out gen_branch_n Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 14/26] target-sparc: Remove gen_opc_jump_pc Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 15/26] target-sparc: Add npc state to insn_start Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 16/26] tcg: Merge cpu_gen_code into tb_gen_code Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 17/26] target-*: Drop cpu_gen_code define Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 18/26] tcg: Add TCG_MAX_INSNS Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 19/26] tcg: Pass data argument to restore_state_to_opc Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 20/26] tcg: Save insn data and use it in cpu_restore_state_from_tb Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 21/26] tcg: Remove gen_intermediate_code_pc Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 22/26] tcg: Remove tcg_gen_code_search_pc Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 23/26] tcg: Emit prologue to the beginning of code_gen_buffer Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 24/26] tcg: Allocate a guard page after code_gen_buffer Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 25/26] tcg: Check for overflow via highwater mark Richard Henderson
2015-10-07  9:43 ` [Qemu-devel] [PULL 26/26] tcg: Adjust CODE_GEN_AVG_BLOCK_SIZE Richard Henderson
2015-10-08 15:50 ` [Qemu-devel] [PULL 00/26] Do away with TB retranslation Peter Maydell

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