From: Cornelia Huck <cornelia.huck@de.ibm.com>
To: qemu-devel@nongnu.org
Cc: Cornelia Huck <cornelia.huck@de.ibm.com>,
borntraeger@de.ibm.com, jfrei@linux.vnet.ibm.com, agraf@suse.de
Subject: [Qemu-devel] [PATCH 4/9] s390x: flagify mcic values
Date: Wed, 14 Oct 2015 13:51:42 +0200 [thread overview]
Message-ID: <1444823507-7267-5-git-send-email-cornelia.huck@de.ibm.com> (raw)
In-Reply-To: <1444823507-7267-1-git-send-email-cornelia.huck@de.ibm.com>
Instead of using magic values when building the machine check
interruption code, add some defines as by chapter 11-14 in the PoP.
This should make it easier to catch problems like the missing vector
register validity bit ("s390x/kvm: Fix vector validity bit in device
machine checks"), and less hassle should we want to generate machine
checks beyond the channel reports we currently support.
Acked-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
---
target-s390x/cpu.h | 45 +++++++++++++++++++++++++++++++++++++++++++++
target-s390x/kvm.c | 23 +++++++++++++++++++----
2 files changed, 64 insertions(+), 4 deletions(-)
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index e4de863..07ae16c 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -1275,4 +1275,49 @@ static inline bool vregs_needed(void *opaque)
return 0;
}
#endif
+
+/* machine check interruption code */
+
+/* subclasses */
+#define MCIC_SC_SD 0x8000000000000000ULL
+#define MCIC_SC_PD 0x4000000000000000ULL
+#define MCIC_SC_SR 0x2000000000000000ULL
+#define MCIC_SC_CD 0x0800000000000000ULL
+#define MCIC_SC_ED 0x0400000000000000ULL
+#define MCIC_SC_DG 0x0100000000000000ULL
+#define MCIC_SC_W 0x0080000000000000ULL
+#define MCIC_SC_CP 0x0040000000000000ULL
+#define MCIC_SC_SP 0x0020000000000000ULL
+#define MCIC_SC_CK 0x0010000000000000ULL
+
+/* subclass modifiers */
+#define MCIC_SCM_B 0x0002000000000000ULL
+#define MCIC_SCM_DA 0x0000000020000000ULL
+#define MCIC_SCM_AP 0x0000000000080000ULL
+
+/* storage errors */
+#define MCIC_SE_SE 0x0000800000000000ULL
+#define MCIC_SE_SC 0x0000400000000000ULL
+#define MCIC_SE_KE 0x0000200000000000ULL
+#define MCIC_SE_DS 0x0000100000000000ULL
+#define MCIC_SE_IE 0x0000000080000000ULL
+
+/* validity bits */
+#define MCIC_VB_WP 0x0000080000000000ULL
+#define MCIC_VB_MS 0x0000040000000000ULL
+#define MCIC_VB_PM 0x0000020000000000ULL
+#define MCIC_VB_IA 0x0000010000000000ULL
+#define MCIC_VB_FA 0x0000008000000000ULL
+#define MCIC_VB_VR 0x0000004000000000ULL
+#define MCIC_VB_EC 0x0000002000000000ULL
+#define MCIC_VB_FP 0x0000001000000000ULL
+#define MCIC_VB_GR 0x0000000800000000ULL
+#define MCIC_VB_CR 0x0000000400000000ULL
+#define MCIC_VB_ST 0x0000000100000000ULL
+#define MCIC_VB_AR 0x0000000040000000ULL
+#define MCIC_VB_PR 0x0000000000200000ULL
+#define MCIC_VB_FC 0x0000000000100000ULL
+#define MCIC_VB_CT 0x0000000000020000ULL
+#define MCIC_VB_CC 0x0000000000010000ULL
+
#endif
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index 3184aca..d8cfd38 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -2065,16 +2065,31 @@ void kvm_s390_io_interrupt(uint16_t subchannel_id,
kvm_s390_floating_interrupt(&irq);
}
+static uint64_t build_channel_report_mcic(void)
+{
+ uint64_t mcic;
+
+ /* subclass: indicate channel report pending */
+ mcic = MCIC_SC_CP |
+ /* subclass modifiers: none */
+ /* storage errors: none */
+ /* validity bits: no damage */
+ MCIC_VB_WP | MCIC_VB_MS | MCIC_VB_PM | MCIC_VB_IA | MCIC_VB_FP |
+ MCIC_VB_GR | MCIC_VB_CR | MCIC_VB_ST | MCIC_VB_AR | MCIC_VB_PR |
+ MCIC_VB_FC | MCIC_VB_CT | MCIC_VB_CC;
+ if (kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS)) {
+ mcic |= MCIC_VB_VR;
+ }
+ return mcic;
+}
+
void kvm_s390_crw_mchk(void)
{
struct kvm_s390_irq irq = {
.type = KVM_S390_MCHK,
.u.mchk.cr14 = 1 << 28,
- .u.mchk.mcic = 0x00400f1d40330000ULL,
+ .u.mchk.mcic = build_channel_report_mcic(),
};
- if (kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS)) {
- irq.u.mchk.mcic |= 0x0000004000000000ULL;
- }
kvm_s390_floating_interrupt(&irq);
}
--
2.6.1
next prev parent reply other threads:[~2015-10-14 11:52 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-14 11:51 [Qemu-devel] [PATCH 0/9] Next set of s390x patches Cornelia Huck
2015-10-14 11:51 ` [Qemu-devel] [PATCH 1/9] util/qemu-config: fix missing machine command line options Cornelia Huck
2015-10-14 11:51 ` [Qemu-devel] [PATCH 2/9] s390x/virtio-ccw: fix 2.4 virtio compat Cornelia Huck
2015-10-14 11:51 ` [Qemu-devel] [PATCH 3/9] s390x/kvm: Fix vector validity bit in device machine checks Cornelia Huck
2015-10-14 11:51 ` Cornelia Huck [this message]
2015-10-14 11:51 ` [Qemu-devel] [PATCH 5/9] s390x: unify device reset during subsystem_reset() Cornelia Huck
2015-10-14 11:51 ` [Qemu-devel] [PATCH 6/9] s390x/ipl: we always have an ipl device Cornelia Huck
2015-10-14 11:51 ` [Qemu-devel] [PATCH 7/9] s390x: machine reset function with new ipl cpu handling Cornelia Huck
2015-10-14 11:51 ` [Qemu-devel] [PATCH 8/9] s390x: reset crypto only on clear reset and QEMU reset Cornelia Huck
2015-10-14 11:51 ` [Qemu-devel] [PATCH 9/9] s390x/cmma: clean up cmma reset Cornelia Huck
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1444823507-7267-5-git-send-email-cornelia.huck@de.ibm.com \
--to=cornelia.huck@de.ibm.com \
--cc=agraf@suse.de \
--cc=borntraeger@de.ibm.com \
--cc=jfrei@linux.vnet.ibm.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).