From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55366) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZmUxi-0007ia-G5 for qemu-devel@nongnu.org; Wed, 14 Oct 2015 18:55:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZmUxh-0006zs-Fw for qemu-devel@nongnu.org; Wed, 14 Oct 2015 18:55:58 -0400 Received: from mail-pa0-x230.google.com ([2607:f8b0:400e:c03::230]:34645) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZmUxh-0006zo-9t for qemu-devel@nongnu.org; Wed, 14 Oct 2015 18:55:57 -0400 Received: by payp3 with SMTP id p3so18888571pay.1 for ; Wed, 14 Oct 2015 15:55:56 -0700 (PDT) From: "Edgar E. Iglesias" Date: Thu, 15 Oct 2015 00:55:34 +0200 Message-Id: <1444863346-9711-2-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1444863346-9711-1-git-send-email-edgar.iglesias@gmail.com> References: <1444863346-9711-1-git-send-email-edgar.iglesias@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v4 01/13] target-arm: Add HPFAR_EL2 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: laurent.desnogues@gmail.com, serge.fdrv@gmail.com, edgar.iglesias@xilinx.com, alex.bennee@linaro.org, agraf@suse.de From: "Edgar E. Iglesias" Reviewed-by: Alex Bennée Signed-off-by: Edgar E. Iglesias --- target-arm/cpu.h | 1 + target-arm/helper.c | 12 ++++++++++++ 2 files changed, 13 insertions(+) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 493f9d0..aaace9b 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -279,6 +279,7 @@ typedef struct CPUARMState { }; uint64_t far_el[4]; }; + uint64_t hpfar_el2; union { /* Translation result. */ struct { uint64_t _unused_par_0; diff --git a/target-arm/helper.c b/target-arm/helper.c index 8367997..5a5e5f0 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3223,6 +3223,10 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = { { .name = "CNTHP_CTL_EL2", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 4, .crn = 14, .crm = 2, .opc2 = 1, .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, + { .name = "HPFAR_EL2", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, + .access = PL2_RW, .accessfn = access_el3_aa32ns_aa64any, + .type = ARM_CP_CONST, .resetvalue = 0 }, REGINFO_SENTINEL }; @@ -3444,6 +3448,14 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { .resetvalue = 0, .writefn = gt_hyp_ctl_write, .raw_writefn = raw_write }, #endif + { .name = "HPFAR", .state = ARM_CP_STATE_AA32, + .cp = 15, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, + .access = PL2_RW, .accessfn = access_el3_aa32ns, + .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) }, + { .name = "HPFAR_EL2", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, + .access = PL2_RW, + .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) }, REGINFO_SENTINEL }; -- 1.9.1