From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55416) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZmUxp-0007iv-He for qemu-devel@nongnu.org; Wed, 14 Oct 2015 18:56:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZmUxm-00070p-Am for qemu-devel@nongnu.org; Wed, 14 Oct 2015 18:56:05 -0400 Received: from mail-pa0-x232.google.com ([2607:f8b0:400e:c03::232]:33756) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZmUxm-00070g-5E for qemu-devel@nongnu.org; Wed, 14 Oct 2015 18:56:02 -0400 Received: by pabrc13 with SMTP id rc13so66820728pab.0 for ; Wed, 14 Oct 2015 15:56:01 -0700 (PDT) From: "Edgar E. Iglesias" Date: Thu, 15 Oct 2015 00:55:35 +0200 Message-Id: <1444863346-9711-3-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1444863346-9711-1-git-send-email-edgar.iglesias@gmail.com> References: <1444863346-9711-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v4 02/13] target-arm: lpae: Make t0sz and t1sz signed integers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: laurent.desnogues@gmail.com, serge.fdrv@gmail.com, edgar.iglesias@xilinx.com, alex.bennee@linaro.org, agraf@suse.de From: "Edgar E. Iglesias" Make t0sz and t1sz signed integers to match tsz and to make it easier to implement support for AArch32 negative t0sz. t1sz is changed for consistensy. No functional change. Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 5a5e5f0..4e19838 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -6471,12 +6471,12 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, * This is a Non-secure PL0/1 stage 1 translation, so controlled by * TTBCR/TTBR0/TTBR1 in accordance with ARM ARM DDI0406C table B-32: */ - uint32_t t0sz = extract32(tcr->raw_tcr, 0, 6); + int32_t t0sz = extract32(tcr->raw_tcr, 0, 6); if (va_size == 64) { t0sz = MIN(t0sz, 39); t0sz = MAX(t0sz, 16); } - uint32_t t1sz = extract32(tcr->raw_tcr, 16, 6); + int32_t t1sz = extract32(tcr->raw_tcr, 16, 6); if (va_size == 64) { t1sz = MIN(t1sz, 39); t1sz = MAX(t1sz, 16); -- 1.9.1